Interconnection system

US10680389B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10680389-B2
Application numberUS-201916390010-A
CountryUS
Kind codeB2
Filing dateApr 22, 2019
Priority dateApr 21, 2018
Publication dateJun 9, 2020
Grant dateJun 9, 2020

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An electrical receptacle connector is mounted within a metallic cage for mating with a QSFP module received within the cage. The contacts of the cable receptacle connector are arranged with two groups, of which one are connected to the printed circuit board on which the cage is mounted, and the other are connected to the wires which are further connected to a board-mount receptacle connector mounted on another printed circuit board on which the CPU (Central Processing Unit) socket is mounted. Each board-mount receptacle connector corresponds to more than one cable receptacle connector.

First claim

Opening claim text (preview).

What is claimed is: 1. An electrical interconnection system comprising: a periphery side and a system side connected with each other via a plurality of cables; the periphery side including: a first printed circuit board; a plurality of cages mounted upon the first printed circuit board; a plurality of receiving cavities formed in the corresponding cages for receiving modules therein; a plurality of cable receptacle connectors located at rear portions of said receiving cavities, respectively; the system side including: a second printed circuit board; and two rows of board-mount receptacle connectors mounted upon a same surface of the second printed circuit board; wherein the plurality of cables are connected between the cable receptacle connectors and the board-mount receptacle connectors; and each of said cables has one end connected to one corresponding board-mount receptacle connector and the other end connected to at least three neighboring cable receptacle connectors. 2. The interconnection system as claimed in claim 1 , wherein the cages are arranged upon two opposite upper and lower surfaces of the first printed circuit board to formed upper cages and lower cages, the receiving cavities comprising upper rows of receiving cavities formed by the upper cages, and lower rows of receiving cavities formed by the lower cages, the cable receptacle connectors comprising an upper row and a lower row of cable receptacle connectors located at rear portions of said upper and lower rows of receiving cavities, respectively. 3. The interconnection system as claimed in claim 1 , wherein each of the cables is connected to three neighboring cable receptacle connectors in the upper row and three neighboring cable receptacle connectors in the lower row. 4. The interconnection system as claimed in claim 3 , wherein said three neighboring cable receptacle connectors in the upper row are aligned with said three neighboring cable receptacle connectors in the lower row in the vertical direction, respectively. 5. The interconnection system as claimed in claim 4 , wherein each of said cables comprises six sets of differential pair wires, and each set comprises two pairs. 6. The interconnection system as claimed in claim 5 , wherein three sets differential pair wires of each cable are fixed by a spacer, and another three sets differential pair wires of the cable are fixed by another spacer. 7. The interconnection system as claimed in claim 4 , wherein each cable is integrally connected to the corresponding cable receptacle connectors while is detachably connected to the corresponding board-mount receptacle connector through a cable plug connector mated with the corresponding board-mount receptacle connector. 8. The interconnection system as claimed in claim 1 , wherein the board-mount receptacle connectors are arranged in a front row and a rear row. 9. The interconnection system as claimed in claim 8 , wherein the front row of board-mount receptacle connectors and the rear row of board-mount receptacle connectors are respectively located by two sides of a CPU heat sink set in the front-to-back direction. 10. The interconnection system as claimed in claim 8 , wherein the front row of board-mount receptacle connectors and the rear row of board-mount receptacle connectors are aligned with each other in a front-to-back direction in a top view. 11. The interconnection system as claimed in claim 8 , wherein the cable connected to the cable receptacle connectors in a middle region is connected to the corresponding board-mount receptacle connector in the front row while the cable connected to the cable receptacle connectors in two outer side regions is connected to the corresponding board-mount receptacle connector in the rear row. 12. The interconnection system as claimed in claim 1 , wherein the first printed circuit board and the second printed circuit board are discrete from each other. 13. An electrical interconnection system comprising: a periphery side and a system side connected with each other via a plurality of cables; the periphery side including: a first printed circuit board; upper and lower cages respectively upon two opposite upper and lower surfaces of the first printed circuit board; upper and lower rows of receiving cavities formed in the corresponding upper and lower cages for receiving upper and lower rows of modules therein; upper and lower rows of cable receptacle connectors located at rear portions of said upper and lower rows of receiving cavities, respectively; the system side including: a second printed circuit board; front and rear rows of board-mount receptacle connectors mounted upon a same surface of the second printed circuit board; and the plurality of cables connected between the cable receptacle connectors and the board-mount receptacle connectors, each of said cables having one end connected to one corresponding board-mount receptacle connector, and the other end connected to all six neighboring cable receptacle connectors in a same upper cage or a same lower cage. 14. The electrical interconnection system as claimed in claim 13 , wherein the cable connected to the cage in an outer region is connected to the corresponding board-mount receptacle connector in a front row while the cable connected to the cage in an inner region is connected to the corresponding board-mount receptacle connector in a rear row so as to keep similar lengths of all cables. 15. The electrical interconnection system as claimed in claim 13 , wherein the front row of the board-mount receptacle connectors and the rear row of the board-mount receptacle connectors are located by two sides of a CPU (Central Processing Unit) and opposite to each other in front-to-back direction. 16. An electrical interconnection system comprising: a periphery side and a system side connected with each other via a plurality of cables; the periphery side including: a first printed circuit board; a plurality of cages mounted upon the first printed circuit board; a plurality of receiving cavities formed in the corresponding cages for receiving modules therein; a plurality of cable receptacle connectors located at rear portions of said receiving cavities, respectively; the system side including: a second printed circuit board; at least one row of board-mount receptacle connectors mounted upon a same surface of the second printed circuit board; and the plurality of cables connected between the cable receptacle connectors and the board-mount receptacle connectors; wherein each of said cables having one end is connected to one corresponding board-mount receptacle connector, and the other end having three sets of differential pairs is connected to at least three neighboring cable receptacle connectors; wherein each of said board-mount receptacle connectors includes: an insulative housing having an upper mating slot and a lower receiving space communicating with each other in a vertical direction, a plurality of passageways located by two sides of the mating slot in a transverse direction perpendicular to the vertical direction and communicating with the receiving space in the vertical direction; and a terminal module received within the receiving space and having a pair of terminal units commonly sandwiching a grounding plate unit therebetween in the transverse direction, each of the terminal units including a plurality of terminals extending into the corresponding passageways, respectively, with corresponding contacting sections extending into the mating slot. 17. The electrical interc

Assignees

Inventors

Classifications

  • for mounting on PCBs · CPC title

  • with resilient means for engaging mating connector · CPC title

  • on printed circuit board (H01R13/6666 - H01R13/6691 take precedence) · CPC title

  • Coupling light guides with opto-electronic elements · CPC title

  • the shield being mounted on a PCB and connected to conductive members · CPC title

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Frequently asked questions

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What does patent US10680389B2 cover?
An electrical receptacle connector is mounted within a metallic cage for mating with a QSFP module received within the cage. The contacts of the cable receptacle connector are arranged with two groups, of which one are connected to the printed circuit board on which the cage is mounted, and the other are connected to the wires which are further connected to a board-mount receptacle connector mo…
Who is the assignee on this patent?
Foxconn Kunshan Computer Connector Co Ltd, Foxconn Interconnect Technology Ltd, Foxconn Kunshan Computer Connector Co
What technology area does this patent fall under?
Primary CPC classification H01R13/659. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 09 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).