Computer systems that are able to reduce memory data flow and graphics processing methods thereof

Patent metadata

Field	Value
Publication number	US-10679318-B2
Application number	US-201916381314-A
Country	US
Kind code	B2
Filing date	Apr 11, 2019
Priority date	Oct 12, 2018
Publication date	Jun 9, 2020
Grant date	Jun 9, 2020

Abstract

A graphics processing method is provided, adapted to a graphic processing unit, the steps including: receiving, via a CSP, a first command associated with all render targets from a display driver; determining, via the display driver, sizes and areas of a plurality of tiles in each frame; repeatedly controlling, via a scissor pool unit, a graphics processing unit to perform drawing processing for each tile according to the first command; comparing, via a signature comparing unit of a cache memory, a signature of a current tile of a current frame and a signature of a tile corresponding to the same position of a previous frame and generating a comparison result; and determining whether to flush the dirty data of the current tile stored in the cache memory from the cache memory to a memory access unit according to the comparison result.

First claim

What is claimed is:

1. A graphics processing method, adapted in a graphics processing unit, comprising:
receiving, via a command stream parser (CSP), a first command associated with all render targets from a display driver;
determining, via the display driver, sizes and areas of a plurality of tiles in each frame;
repeatedly controlling, via a scissor pool unit, a graphics processing unit to perform drawing processing on each tile according to the first command;
comparing, via a signature comparing unit of a cache memory, a signature of a current tile of a current frame and a signature of a tile corresponding to the same position of a previous frame and generating a comparison result; and
determining whether to flush the dirty data of the current tile stored in the cache memory from the cache memory to a memory access unit according to the comparison result;
wherein when the graphics processing unit performs the drawing processing on the tile, the graphics processing unit only draws the render targets that overlap the tile.

2. The graphics processing method of claim 1 , further comprising:
generating, via a central processing unit (CPU), a drawing command corresponding to a drawing task;
detecting, via the display driver, a plurality of frames that can be rendered in a tile-based rendering mode in the drawing command;
adding, via the display driver, a first mark command and a second mark command to a head and a tail of the drawing command corresponding to part of the frame respectively; and
packing, via the display driver, the first mark command, the specified command, and the second mark command to be the first command.

3. The graphics processing method of claim 1 , further comprising:
packing, via the cache, the data of the current tile in the current frame and giving a specified value to the data as the signature of the current tile.

4. The graphics processing method of claim 3 , further comprising:
compressing, via the cache, the signature to a size of 64 bits.

5. The graphics processing method of claim 1 , wherein when the signature of the current tile in the current frame is the same as the signature of the tile in the same location in the previous frame, the cache does not flush the dirty data of the current tile to the memory access unit.

6. The graphics processing method of claim 5 , wherein when the signature of the current tile in the current frame is not the same as the signature of the tile in the same location in the previous frame, the cache flushes the dirty data of the current tile to the memory access unit.

7. The graphics processing method of claim 1 , wherein the graphics processing unit at least comprises a command stream parser, a shader execution unit, a rasterizer, and a testing unit, wherein the testing unit is at least configured to perform a depth & stencil test and an alpha test.

8. A computer system, comprising:
a display driver, deposited in a central processing unit (CPU) and configured to generate a first command associated with all render targets and to determine sizes and areas of a plurality of tiles in each frame;
a scissor pool unit, deposited in a command stream parser and configured to repeatedly control a graphics processing unit to perform drawing processing on each of the tiles;
a signature comparison unit, deposited in a cache and configured to compare a signature of a current tile in a current frame with a signature of a tile in the same location in a previous frame and to generate a comparison result, wherein the signature comparison unit is also configured to determine whether to flush the data corresponding to the current tile to the memory access unit according to the comparison result; and
a memory access unit, configured to store the signature corresponding to the current tile and dirty data;
wherein when the graphics processing unit performs the drawing processing on the tile, the graphics processing unit only draws the render targets that are overlapped with the tiles.

9. The computer system of claim 8 , wherein:
the CPU is configured to generate a drawing command; and
wherein the display driver further detects that a plurality of frames being able to be rendered in a tile-based rendering mode, adds a first mark command and a second mark command to a head and a tail of part of the drawing command corresponding to the frames respectively, and packs the first mark command, the specified command, and the second mark command as the first command.

10. The computer system of claim 8 , wherein the cache further packs data of the current tile in the current frame and gives a specified value to the data as the signature corresponding to the current tile.

11. The computer system of claim 10 , wherein the cache further compresses the signature to a size of 64 bits.

12. The computer system of claim 8 , wherein when the signature of the current tile in the current frame is the same as the signature of the tile in the same location in the previous frame, the cache does not flush the dirty data of the current tile to the memory access unit.

13. The computer system of claim 12 , wherein when the signature of the current tile in the current frame is not the same as the signature of the tile in the same location in the previous frame, the cache flushes the dirty data of the current tile to the memory access unit.

14. The computer system of claim 8 , wherein the graphics processing unit at least comprises a command stream parser, a shader execution unit, a rasterizer, and a testing unit, wherein the testing unit is at least configured to perform a depth & stencil test and an alpha test.

Assignees

• Shanghai Zhaoxin Semiconductor Co Ltd

Inventors

• Wu Fengxia
• Gu Deming
• Que Heng
• Zhou Yi
• Wang Ying

Classifications

• G06T15/005

  General purpose rendering architectures · CPC title

• G06T1/60

  Memory management · CPC title

• G06T1/20 Primary

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G06T15/80

  Shading · CPC title

• G09G5/363 Primary

  Graphics controllers · CPC title