Opto electrical test measurement system for integrated photonic devices and circuits

US10677684B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10677684-B2
Application numberUS-201816211511-A
CountryUS
Kind codeB2
Filing dateDec 6, 2018
Priority dateApr 20, 2016
Publication dateJun 9, 2020
Grant dateJun 9, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.

First claim

Opening claim text (preview).

The invention claimed is: 1. An apparatus for testing an optical testing circuit on a wafer, wherein said optical testing circuit includes: an optical input configured to receive an optical test signal and a plurality of photodetectors configured to generate a corresponding plurality of electrical signals in response to optical processing of said optical test signal through the optical testing circuit, comprising: a probe card including a plurality of electrical probes configured to probe the wafer and receive the plurality of electrical signals; a multiplexer circuit coupled to the probe card to receive the plurality of electrical signals and configured to sequentially select an electrical signal from the plurality of electrical signals generated by the plurality of photodetectors for output as a selected electrical signal; and a testing circuit configured, for each selected electrical signal, to: sweep the wavelength of the optical test signal over a range of wavelengths from a start wavelength to a stop wavelength; generate test data from the selected electrical signal over the sweep in wavelength of the optical test signal; determine whether all electrical signals of the plurality of electrical signals have been selected; and if not, then control the multiplexer to change the selected electrical signal and repeat. 2. A testing circuit, comprising: an optical circuit configured to apply an optical test signal to an optical input with a sweep in wavelength including a plurality of steps over a range of wavelengths from a start wavelength to a stop wavelength, wherein a signal derived from said optical test signal is passed through at least one optical device under test (DUT) circuit; a photodetector circuit configured to detect the optical test signal and a signal output from the DUT circuit to generate a corresponding plurality of electrical signals; and a circuit operating, for each step of the sweep in wavelength, to: simultaneously receive the plurality of electrical signals; generate test data from the simultaneously received plurality of electrical signals; store the test data; detect a change in the step of the sweep in wavelength; and output the stored test data in response to the detected change in step. 3. The testing circuit of claim 2 , wherein each electrical signal of said plurality of electrical signals is converted to a digital signal to generate the test data. 4. The testing circuit of claim 3 , further comprising a memory configured to store the digital signal for the test data. 5. The testing circuit of claim 4 , wherein the circuit reads the stored digital signal from the memory. 6. The testing circuit of claim 2 , further comprising controlling a gain of each electrical signal of the plurality of electrical signals at each step of the sweep in wavelength, wherein controlling the gain comprises adapting gain so that the electrical signal is within an operating range. 7. The testing circuit of claim 2 , wherein the output stored test data includes an identification of the step in the sweep in wavelength of the optical test signal that corresponds to the simultaneously received plurality of electrical signals from which the stored test data is generated. 8. The testing circuit of claim 7 , wherein the identification of the step is an identification of the wavelength for that step.

Assignees

Inventors

Classifications

  • Combinations of two or more optical elements · CPC title

  • Optical aspects, e.g. opto-electronics used for testing, optical signal transmission for testing electronic circuits, electro-optic components to be tested in combination with electronic circuits, measuring light emission of digital circuits (probes having electro-optic elements G01R1/071; electro-optic sampling for oscilloscopes G01R13/347; contactless testing of individual semiconductor devices by optical means G01R31/2656) · CPC title

  • G01M11/02Primary

    Testing optical properties · CPC title

  • Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements {(testing printed circuit boards G01R31/2801)} · CPC title

  • G01M11/33Primary

    with a light emitter being disposed at one fibre or waveguide end-face, and a light receiver at the other end-face · CPC title

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Frequently asked questions

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What does patent US10677684B2 cover?
An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data f…
Who is the assignee on this patent?
St Microelectronics Crolles 2 Sas
What technology area does this patent fall under?
Primary CPC classification G01M11/02. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 09 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).