System and computer-implemented method for identifying defective chip cards through substandard transaction experiences

US10671818B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10671818-B2
Application numberUS-201715844320-A
CountryUS
Kind codeB2
Filing dateDec 15, 2017
Priority dateDec 15, 2017
Publication dateJun 2, 2020
Grant dateJun 2, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system and computer-implemented method for analyzing chip card transactions to identify defective chip cards and/or defective chip readers in need of replacement. Constraints are established to define a subset of card transactions. From a full set of card transactions the subset is identified consisting of each card transaction falling within the constraints and occurring at a merchant having a chip reader. From this subset the unique chip cards are identified, and for each unique chip card a percentage of fallback transactions is calculated. The percentage of fallback transactions is compared to a maximum value, and if the percentage of fallback transactions exceeds the maximum value, the chip card is identified as defective. Each defective chip card is reported to the card issuer, along with at least a recommendation to replace the defective chip card. A similar process may be used to identify defective chip readers of particular merchants.

First claim

Opening claim text (preview).

Having thus described one or more embodiments of the invention, what is claimed as new and desired to be protected by Letters Patent includes the following: 1. A system for identifying and addressing a transaction problem with a subset of card transactions, the system comprising: an electronic communications element configured to receive information about a plurality of card transactions via a communications network; an electronic memory element configured to store the information about the plurality of card transactions as a set of card transactions in a transaction database, and to store one or more constraints which at least partially define the subset of card transactions; and an electronic processing element configured to— access the transaction database containing the set of card transactions, identify from the set of card transactions the subset of card transactions consisting of each card transaction that falls within the one or more constraints and that occurred at a merchant having a chip reader transaction terminal, identify from the subset of card transactions a plurality of unique cards, identify from the plurality of unique cards a plurality of unique chip cards, identify for each unique chip card a number of chip transactions and a number of fallback transactions, wherein the number of chip transactions plus the number of fallback transactions is a total number of attempted chip transactions, calculate for each unique chip card a percentage of fallback transactions based on the total number of attempted chip transactions, compare for each unique chip card the percentage of fallback transactions to a pre-established maximum card value, and if the percentage of fallback transactions exceeds the pre-established maximum card value, identify the unique chip card as defective, and report each unique chip card identified as defective to a card issuer of the unique chip card, and at least recommend to the card issuer that each unique chip card identified as defective be replaced. 2. The system of claim 1 , wherein the one or more constraints which define the subset of card transactions include at least one of— one or more particular card issuers, a particular geographic region, and a particular time period. 3. The system of claim 2 , the electronic processing element being further configured to determine for each unique chip card a historical percentage of fallback transactions based on a historical total number of attempted chip transactions over a historical time period that is longer than the particular time period. 4. The system of claim 1 , wherein identifying the plurality of unique chip cards includes identifying each unique card that was used in a chip card transaction. 5. The system of claim 1 , the electronic processing element being further configured to determine for each unique chip card a number of different merchants at which the number of fallback transactions occurred. 6. The system of claim 1 , the electronic processing element being further configured to determine for each unique chip card a week day on which each fallback transaction occurred. 7. The system of claim 1 , the electronic processing element being further configured to determine for each unique chip card whether a frequency of fallback transactions is changing over time. 8. The system of claim 1 , the electronic processing element being further configured to direct the card issuer to replace the unique chip card identified as defective. 9. The system of claim 1 , further including the card issuer replacing the unique chip card identified as defective. 10. The system of claim 1 , the electronic processing element being further configured to determine for each unique chip card a particular merchant at which each fallback transaction occurred. 11. A computer-implemented method for improving the functioning of a computer for identifying and addressing a transaction problem with a subset of card transactions: establishing one or more constraints to at least partially define the subset of card transactions; accessing a transaction database containing a set of card transactions; identifying from the set of card transactions the subset of card transactions consisting of each card transaction that falls within the one or more constraints and that occurred at a merchant having a chip reader transaction terminal; identifying from the subset of card transactions a plurality of unique cards; identifying from the plurality of unique cards a plurality of unique chip cards; identifying for each unique chip card a number of chip transactions and a number of fallback transactions, wherein the number of chip transactions plus the number of fallback transactions is a total number of attempted chip transactions; calculating for each unique chip card a percentage of fallback transactions based on the total number of attempted chip transactions; comparing for each unique chip card the percentage of fallback transactions to a pre-established maximum card value, and if the percentage of fallback transactions exceeds the pre-established maximum card value, identifying the unique chip card as defective; and reporting each unique chip card identified as defective to a card issuer of the unique chip card, and at least recommending to the card issuer that each unique chip card identified as defective be replaced. 12. The computer-implemented method of claim 11 , wherein the one or more constraints to define the subset of card-based transaction experiences include at least one of— one or more particular card issuers, a particular geographic region, and a particular time period. 13. The computer-implemented method of claim 12 , further including determining for each unique chip card a historical percentage of fallback transactions based on a historical total number of attempted chip transactions over a historical time period that is longer than the particular time period. 14. The computer-implemented method of claim 11 , wherein identifying the plurality of unique chip cards includes identifying each unique card that was used in a chip card transaction. 15. The computer-implemented method of claim 11 , further including determining for each unique chip card a number of different merchants at which the number of fallback transactions occurred. 16. The computer-implemented method of claim 11 , further including determining for each unique chip card a week day on which each fallback transaction occurred. 17. The computer-implemented method of claim 11 , further including determining for each unique chip card whether a frequency of fallback transactions is changing over time. 18. The computer-implemented method of claim 11 , further including directing the card issuer to replace the unique chip card identified as defective. 19. The computer-implemented method of claim 11 , further including replacing the unique chip card identified as defective. 20. The computer-implemented method of claim 11 , further including determining for each unique chip card a particular merchant at which each fallback transaction occurred. 21. A computer-implemented method for improving the functioning of a computer for identifying and addressing a transaction problem with a subset of card transactions: establishing one or more constraints to at least partially define the subset of card transactions, the one or more constraints including a particular time period; accessing a transaction database containing a set of card transactions; i

Assignees

Inventors

Classifications

  • comprising an arrangement for testing the record carrier · CPC title

  • Administration; Management · CPC title

  • G06K7/0095Primary

    Testing the sensing arrangement, e.g. testing if a magnetic card reader, bar code reader, RFID interrogator or smart card reader functions properly (testing of electrical circuits G01R31/28) · CPC title

  • G06Q10/20Primary

    Administration of product repair or maintenance · CPC title

  • Features insuring the integrity of the data on or in the card · CPC title

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Frequently asked questions

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What does patent US10671818B2 cover?
A system and computer-implemented method for analyzing chip card transactions to identify defective chip cards and/or defective chip readers in need of replacement. Constraints are established to define a subset of card transactions. From a full set of card transactions the subset is identified consisting of each card transaction falling within the constraints and occurring at a merchant having…
Who is the assignee on this patent?
Mastercard International Inc
What technology area does this patent fall under?
Primary CPC classification G06K7/0095. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 02 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).