Device arrangement

Patent metadata

Field	Value
Publication number	US-10669152-B2
Application number	US-201615768531-A
Country	US
Kind code	B2
Filing date	Oct 6, 2016
Priority date	Oct 14, 2015
Publication date	Jun 2, 2020
Grant date	Jun 2, 2020

Abstract

Various embodiments may provide a device arrangement. The device arrangement may include a substrate including a conductive layer. The device arrangement may further include a microelectromechanical systems (MEMS) device monolithically integrated with the substrate, wherein the MEMS device may be electrically coupled to the conductive layer. A cavity may be defined through the conductive layer for acoustically isolating the MEMS device MEMS device from the substrate. At least one anchor structure may be defined by the conductive layer to support the MEMS device.

First claim

What is claimed is:

1. A device arrangement comprising:
a substrate comprising a conductive layer; and
a microelectromechanical systems (MEMS) device monolithically integrated with the substrate, wherein the MEMS device is electrically coupled to the conductive layer,
wherein a cavity is defined through the conductive layer for acoustically isolating the MEMS device from the substrate,
wherein a depth of the cavity is equal to a thickness of the conductive layer;
wherein the depth of the cavity is a value selected from a range of 1 μm to 4 μm; and
wherein at least one anchor structure is defined by the conductive layer to support the MEMS device so that the MEMS device is on the at least one anchor structure and over the cavity.

2. The device arrangement of claim 1 ,
wherein the conductive layer comprises a plurality of conductive regions, and wherein at least one conductive region of the plurality of conductive regions defines the at least one anchor structure.

3. The device arrangement of claim 2 ,
wherein the plurality of conductive regions are spaced apart from each other, and
wherein the cavity is defined in a spacing between two conductive regions of the plurality of conductive regions.

4. The device arrangement of claim 2 ,
wherein each conductive region of the plurality of conductive regions comprises a tapered conductive region.

5. The device arrangement of claim 1 ,
wherein the cavity is a sealed cavity.

6. The device arrangement of claim 1 ,
wherein the cavity is exposed to external environment.

7. The device arrangement of claim 1 ,
wherein the entire cavity is defined within the conductive layer.

8. The device arrangement of claim 1 , further comprising:
a channel in fluid communication with the cavity.

9. The device arrangement of claim 8 ,
wherein an end of the channel opposite to the cavity is sealed.

10. The device arrangement of claim 8 ,
wherein the channel is defined at least partially though the MEMS device.

11. The device arrangement of claim 1 , further comprising:
a diaphragm arranged over the MEMS device for tuning at least one property of the MEMS device.

12. The device arrangement of claim 1 ,
wherein the substrate comprises a circuit arrangement electrically coupled to the conductive layer.

13. The device arrangement of claim 1 ,
wherein the substrate and the conductive layer are part of a complementary metal-oxide semiconductor (CMOS) device, and wherein the MEMS device is monolithically integrated with the CMOS device.

14. The device arrangement of claim 1 ,
wherein the conductive layer is the topmost layer of the substrate.

15. The device arrangement of claim 1 ,
wherein the conductive layer is a metal layer.

16. The device arrangement of claim 1 ,
wherein the MEMS device comprises at least one electrode electrically coupled to the conductive layer.

17. The device arrangement of claim 16 , further comprising:
an electrical via defined at least partially though the MEMS device, wherein the at least one electrode is electrically coupled to the conductive layer through the electrical via.

18. The device arrangement of claim 2 ,
wherein the MEMS device comprises:
a first electrode layer comprising a first electrode portion and a second electrode portion electrically isolated from each other; and
a second electrode layer electrically coupled to the second electrode portion,

wherein the first electrode portion is electrically coupled to a first conductive region of the plurality of conductive regions, and
wherein the second electrode portion is electrically coupled to a second conductive region of the plurality of conductive regions, the second conductive region being electrically isolated from the first conductive region.

19. The device arrangement of claim 1 ,
wherein the MEMS device comprises a piezoelectric MEMS device.

20. The device arrangement of claim 1 ,
wherein the device arrangement comprises a piezoelectric micro-machined ultrasonic transducer (PMUT).

Assignees

• Agency Science Tech & Res

Inventors

• Singh Navab
• Lee Jae Wung
• Merugu Srinivas

Classifications

• B81B2203/0127

  Diaphragms, i.e. structures separating two media that can control the passage from one medium to another; Membranes, i.e. diaphragms with filtering function · CPC title

• B06B1/0666

  used as a diaphragm · CPC title

• B81B7/008

  MEMS characterised by an electronic circuit specially adapted for controlling or driving the same (B81B7/0087 takes precedence; arrangements for starting, regulating, braking, or otherwise controlling an actuator H02N; control arrangements or circuits for visual indicators G09G3/00) · CPC title

• B81C1/00039

  Anchors · CPC title

• B81C2203/0735

  Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit · CPC title