Degenerated transimpedance amplifier with wire-bonded photodiode for reducing group delay distortion

US10666203B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10666203-B2
Application numberUS-201816157772-A
CountryUS
Kind codeB2
Filing dateOct 11, 2018
Priority dateSep 28, 2016
Publication dateMay 26, 2020
Grant dateMay 26, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for improving group delay across one or more variations corresponding to a transimpedance amplifier, the method comprising: producing a degeneration impedance by a degeneration inductor; wherein the transimpendance amplifier comprises an inverting amplifier including the degeneration inductor; monitoring the degeneration impedance through a tracking feedback loop; and adjusting an inductance of the degeneration inductor to alter the degeneration impedance in response to the one more variations; wherein the inverting amplifier comprises: a first transistor coupled to a positive voltage input; and a second transistor coupled to a negative voltage input; wherein the degeneration inductor is connected between emitters of the first and second transistors. 2. The method according to claim 1 , wherein the one or more variations comprise at least one of bond wire length, process, voltage and temperature. 3. The method according to claim 1 , further comprising flattening a group delay profile over a frequency range, wherein the group delay profile corresponds to the inductance of the degeneration inductor. 4. The method according to claim 1 , wherein: the transimpedance amplifier is electrically connected to a device via a bond wire; and the degeneration impedance flattens the group delay associated with an inductance of the bond wire. 5. The method according to claim 4 , wherein the device is a photodiode. 6. A method for improving group delay across one or more variations corresponding to a transimpedance amplifier, the method comprising: producing, by one or more inductors, a degeneration impedance; wherein the transimpendance amplifier comprises an inverting amplifier including the one or more inductors; monitoring the degeneration impedance; and adjusting an inductance of the one or more inductors to alter the degeneration impedance in response to the one more variations; wherein the inverting amplifier comprises: a first transistor coupled to a positive voltage input; and a second transistor coupled to a negative voltage input; wherein the one or more inductors are connected between emitters of the first and second transistors. 7. The method according to claim 6 , wherein the one or more variations comprise at least one of bond wire length, process, voltage and temperature. 8. The method according to claim 6 , further comprising flattening a group delay profile over a frequency range, wherein the group delay profile corresponds to the inductance of the one or more inductors. 9. The method according to claim 6 , wherein: the transimpedance amplifier is electrically connected to a device via a bond wire; and the degeneration impedance flattens the group delay associated with an inductance of the bond wire. 10. The method according to claim 9 , wherein the device is a photodiode. 11. The method according to claim 1 , wherein: a first resistor is coupled to a junction of a first one of the emitters and a first end of the degeneration inductor; and a second resistor is coupled to a junction of a second one of the emitters and a second end of the degeneration inductor. 12. The method according to claim 6 , wherein: a first resistor is coupled to a junction of a first one of the emitters and a first end of an inductor of the one or more inductors; and a second resistor is coupled to a junction of a second one of the emitters and a second end of the inductor of the one or more inductors.

Assignees

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Classifications

  • Long tailed pairs (H03F3/45112, H03F3/45139 take precedence) · CPC title

  • One or more added reactive elements, capacitive or inductive elements, to the amplifying transistors in the differential amplifier · CPC title

  • Differential amplifier with circuit arrangements to enhance the transconductance · CPC title

  • H03F1/34Primary

    Negative-feedback-circuit arrangements with or without positive feedback (H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence {; for rejection of common mode signals H03F3/45479}) · CPC title

  • H04B10/693Primary

    Arrangements for optimizing the preamplifier in the receiver · CPC title

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What does patent US10666203B2 cover?
An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H03F1/34. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 26 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).