Comparator, analog-to-digital converter, solid-state image pickup device, and image pickup apparatus

Patent metadata

Field	Value
Publication number	US-10659022-B2
Application number	US-201616065848-A
Country	US
Kind code	B2
Filing date	Nov 30, 2016
Priority date	Jan 7, 2016
Publication date	May 19, 2020
Grant date	May 19, 2020

Abstract

In a comparator of an analog-to-digital converter, an input signal is input to a control terminal of each of a plurality of signal input transistors. A signal input transistor selection section selects any one of the plurality of signal input transistors, and generates a current in response to a difference between the input signal and a reference signal to flow in the differential pair configured with the selected signal input transistor and a reference input transistor. A load section converts, at a time of a change of a current flowing in any one of the plurality of signal input transistors and the reference input transistor in response to the difference, the change of the current into a change of a voltage, and outputs the change of the voltage as a result of comparison between the input signal and the reference signal.

First claim

The invention claimed is:

1. A comparator, comprising:
a plurality of signal input transistors each having a control terminal to which an input signal is input;
a reference input transistor configuring, together with each of the plurality of signal input transistors, a differential pair, and having a control terminal to which a reference signal is input;
a signal input transistor selection section selecting any one of the plurality of signal input transistors, and generating a current in response to a difference between the input signal and the reference signal to flow in the differential pair configured with the selected signal input transistor and the reference input transistor; and
a load section converting, at a time of a change of a current flowing in any one of the plurality of signal input transistors and the reference input transistor in response to the difference, the change of the current into a change of a voltage, and outputting the change of the voltage as a result of comparison between the input signal and the reference signal,
wherein the signal input transistor selection section selects the one signal input transistor by applying, to the control terminals of unselected signal input transistors among the plurality of signal input transistors, a voltage for turning the unselected signal input transistors into a non-conductive state.

2. The comparator according to claim 1 , wherein the signal input transistor selection section selects the one signal input transistor by interrupting a current flowing in the unselected signal input transistors among the plurality of signal input transistors.

3. The comparator according to claim 1 , wherein the load section is configured with a current source that supplies a current to the plurality of signal input transistors.

4. The comparator according to claim 3 , wherein the load section is configured with a current mirror circuit that supplies, to the plurality of signal input transistors, a current substantially equal to a current flowing in the reference input transistor.

5. A comparator, comprising:
a plurality of signal input transistors each having a control terminal to which an input signal is input;
a plurality of reference input transistors configuring, together with the respective plurality of signal input transistors, differential pairs, and each having a control terminal to which a reference signal is input;
a signal input transistor selection section selecting any one of the plurality of signal input transistors, and generating a current in response to a difference between the input signal and the reference signal to flow in the differential pair configured with the selected signal input transistor and one of the plurality of reference input transistors; and
a load section converting, at a time of a change of a current flowing in any one of the plurality of signal input transistors and the plurality of reference input transistors in response to the difference, the change of the current into a change of a voltage, and outputting the change of the voltage as a result of comparison between the input signal and the reference signal,
wherein the signal input transistor selection section selects the one signal input transistor by interrupting a current flowing in the differential pairs including unselected signal input transistors among the differential pairs, and
wherein the signal input transistor selection section is configured with a plurality of constant current power supplies that are connected to the respective differential pairs and that control a current flowing in the differential pairs, the signal input transistor selection section interrupting the current flowing in the differential pairs including the unselected signal input transistors by using the constant current power supplies.

6. An analog-to-digital converter comprising:
a plurality of signal input transistors each having a control terminal to which an input signal is input;
a reference input transistor configuring, together with each of the plurality of signal input transistors, a differential pair, and having a control terminal to which a reference signal is input;
a signal input transistor selection section selecting any one of the plurality of signal input transistors, and generating a current in response to a difference between the input signal and the reference signal to flow in the differential pair configured with the selected signal input transistor and the reference input transistor;
a load section converting, at a time of a change of a current flowing in any one of the plurality of signal input transistors and the reference input transistor in response to the difference, the change of the current into a change of a voltage, and outputting the change of the voltage as a result of comparison between the input signal and the reference signal; and
a retention section retaining a digital signal in response to the reference signal on the basis of the output result of the comparison, and outputting the retained digital signal as a result of analog-to-digital conversion performed on the input signal.

7. A solid-state image pickup device comprising:
a plurality of photoelectric conversion sections each generating a signal in response to incident light;
a plurality of signal input transistors each having a control terminal to which a respective generated signal is input;
a reference input transistor configuring, together with each of the plurality of signal input transistors, a differential pair, and having a control terminal to which a reference signal is input;
a signal input transistor selection section selecting any one of the plurality of signal input transistors, and generating a current in response to a difference between the input signal and the reference signal to flow in the differential pair configured with the selected signal input transistor and the reference input transistor;
a load section converting, at a time of a change of a current flowing in any one of the plurality of signal input transistors and the reference input transistor in response to the difference, the change of the current into a change of a voltage, and outputting the change of the voltage as a result of comparison between the input signal and the reference signal; and
a retention section retaining a digital signal in response to the reference signal on the basis of the output result of the comparison, and outputting the retained digital signal as a result of analog-to-digital conversion performed on the generated signal.

8. An image pickup apparatus comprising:
a plurality of photoelectric conversion sections each generating a signal in response to incident light;
a plurality of signal input transistors each having a control terminal to which a respective generated signal is input;
a reference input transistor configuring, together with each of the plurality of signal input transistors, a differential pair, and having a control terminal to which a reference signal is input;
a signal input transistor selection section selecting any one of the plurality of signal input transistors, and generating a current in response to a difference between the input signal and the reference signal to flow in the differential pair configured with the selected signal input transistor and the reference input transistor;
a load section converting, at a time of a change of a current flowing in any one of the plurality of signal input transistors and the reference input transistor in response to the difference, the change of the current into a change of a voltage, and outputting the change of the voltage as a result of comparison between the generated signal and the reference signal;
a retention section retaining a digital signal in response to the ref

Assignees

• Sony Corp

Inventors

• Sakakibara Masaki

Classifications

• H03K5/2481

  with at least one differential stage · CPC title

• H03K5/08 Primary

  by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding (H03K5/07 takes precedence; comparing one pulse with another H03K5/22; providing a determined threshold for switching H03K17/30) · CPC title

• H03M1/56

  Input signal compared with linear ramp · CPC title

• H04N5/37455

  Electricity · mapped topic

• H04N5/374

  Electricity · mapped topic