Semiconductor device including a blocking layer having a varying thickness

Patent metadata

Field	Value
Publication number	US-10658376-B2
Application number	US-201816003763-A
Country	US
Kind code	B2
Filing date	Jun 8, 2018
Priority date	Dec 9, 2015
Publication date	May 19, 2020
Grant date	May 19, 2020

Abstract

According to one embodiment, a semiconductor device includes a substrate, a stacked body, and a columnar portion. The stacked body, provided on the substrate, includes first conductive layers and first insulating layers provided alternately along a first direction. The columnar portion extends through the stacked body in the first direction. The columnar portion includes a blocking layer, a charge storage layer, a tunneling layer, and a semiconductor layer. The columnar portion includes a first portion and a second portion. The second portion is provided on the substrate side of the first portion. A dimension in the second direction of the second portion is smaller than a dimension in a second direction of the first portion. A portion of the blocking layer is provided at the second portion being thicker than a portion of the blocking layer provided at the first portion.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate;
a stacked body including a plurality of first conductive layers and a plurality of first insulating layers and being provided on the substrate, the first conductive layers and the first insulating layers being provided alternately along a first direction; and
a columnar portion extending through the stacked body in the first direction, the columnar portion including
a blocking layer provided on the plurality of first conductive layers and on the plurality of first insulating layers in a second direction crossing the first direction,
a charge storage layer provided on the blocking layer in the second direction,
a tunneling layer provided on the charge storage layer in the second direction, and
a semiconductor layer provided on the tunneling layer in the second direction,

the columnar portion including a first portion and a second portion, the second portion being provided on the substrate side of the first portion,
a width in the second direction of the second portion being smaller than a width in the second direction of the first portion,
a portion of the blocking layer provided at the second portion being thicker than a portion of the blocking layer provided at the first portion.

2. The device according to claim 1 , further comprising:
a second conductive layer thicker than the first conductive layer;
a second insulating layer provided on the second conductive layer;
a third insulating layer; and
a third conductive layer provided on the third insulating layer, the third conductive layer being thicker than the first conductive layer,
the stacked body being provided between the second insulating layer and the third insulating layer,
the columnar portion piercing the second insulating layer and the third insulating layer,
a portion of the blocking layer provided on the second insulating layer being thicker than a portion of the blocking layer provided on the third insulating layer.

3. The device according to claim 2 , further comprising a linking portion,
a portion of the linking portion being provided between the second conductive layer and the columnar portion,
a plurality of the columnar portions being provided for one of the linking portions,
the blocking layer being provided on the second conductive layer at the linking portion,
the charge storage layer being provided on the blocking layer at the linking portion,
the tunneling layer being provided on the charge storage layer at the linking portion,
the semiconductor layer being provided on the tunneling layer at the linking portion,
a portion of the blocking layer provided at the linking portion being thicker than a portion of the blocking layer provided at the first portion.

4. The device according to claim 3 , further comprising an insulating portion extending in the first direction,
the insulating portion being provided between a plurality of the columnar portions provided for one of the linking portions.

5. The device according to claim 1 , wherein the blocking layer includes silicon oxide or a high dielectric constant material.

6. The device according to claim 1 , wherein
the blocking layer includes a first layer and a second layer,
the first layer includes a first insulating material,
the second layer includes a second insulating material,
the first layer is provided at the first portion, and
the second layer is provided at the first portion and the second portion.

7. The device according to claim 6 , wherein the first insulating material is the same as the second insulating material.

8. A semiconductor device, comprising:
a substrate;
a stacked body including a plurality of first conductive layers and a plurality of first insulating layers and being provided on the substrate, the first conductive layers and the first insulating layers being provided alternately along a first direction; and
a columnar portion extending through the stacked body in the first direction, the columnar portion including
a blocking layer provided on the plurality of first conductive layers and on the plurality of first insulating layers in a second direction crossing the first direction,
a charge storage layer provided on the blocking layer in the second direction,
a tunneling layer provided on the charge storage layer in the second direction, and

a semiconductor layer provided on the tunneling layer in the second direction,

the blocking layer including a third portion and a fourth portion, the fourth portion being positioned between the third portion and the substrate,
the third portion overlapping a portion of the plurality of first conductive layers in the second direction,
the fourth portion overlapping another portion of the plurality of first conductive layers in the second direction,
a width in the second direction of the fourth portion being smaller than a width in the second direction of the third portion,
a thickness in the second direction of the fourth portion being greater than a thickness in the second direction of the third portion.

9. The device according to claim 8 , further comprising:
a second conductive layer; and
a second insulating layer provided between the second conductive layer and the plurality of first conductive layers and between the second conductive layer and the plurality of first insulating layers in the second direction,
a distance in the second direction between the fourth portion and the second conductive layer being longer than a distance in the second direction between the third portion and the second conductive layer.

10. The device according to claim 8 , wherein
the blocking layer has a first surface facing the plurality of first conductive layers and the plurality of first insulating layers, and
the first surface is recessed toward the semiconductor layer at the third portion and the fourth portion.

11. The device according to claim 10 , wherein the first surface is recessed more at the fourth portion than at the third portion.

12. The device according to claim 8 , wherein
the blocking layer includes a fifth portion and a sixth portion, the sixth portion being positioned between the fifth portion and the substrate;
the fifth portion overlaps a portion of the plurality of first insulating layers in the second direction;
the sixth portion overlaps another portion of the plurality of first insulating layers in the second direction,
a width in the second direction of the sixth portion is smaller than a width in the second direction of the fifth portion, and
a thickness in the second direction of the sixth portion is substantially equal to a thickness in the second direction of the fifth portion.

13. The device according to claim 12 , wherein the thickness in the second direction of the sixth portion is greater than the thickness in the second direction of the fourth portion.

14. A method for manufacturing a semiconductor device, comprising:
forming a conductive layer and a first insulating layer alternately on a substrate, a plurality of the conductive layers and a plurality of the first insulating layers being formed;
exposing side surfaces of the plurality of conductive layers by forming a hole in a stacked body, the stacked body including the plurality of conductive layers and the plurality of first insulating layers, the hole extending in the stacking direction;
forming a blocking layer on the side surfaces of the plurality of conductive layers;
forming a charge storage layer on the blocking layer in a first direction crossing the stacking direction;
forming a tunneling layer on the charge storage l

Assignees

• Toshiba Memory Corp

Inventors

• SAWABE Ryosuke
• Kinoshita Shigeru
• Yamada Kenta
• Ishigaki Hirokazu

Classifications

• H10P76/2041

  Photolithographic processes · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/267

  using plasmas · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title