Internal copy to handle NAND program fail

Patent metadata

Field	Value
Publication number	US-10658056-B2
Application number	US-201715852785-A
Country	US
Kind code	B2
Filing date	Dec 22, 2017
Priority date	Dec 22, 2017
Publication date	May 19, 2020
Grant date	May 19, 2020

Abstract

An embodiment of a semiconductor package apparatus may include technology to attempt to program data in a first portion of a nonvolatile memory, determine if the attempt was successful, and recover the data to a second portion of the nonvolatile memory with an internal data move operation if the attempt is determined to be not successful. Other embodiments are disclosed and claimed.

First claim

We claim:

1. An electronic processing system, comprising:
a processor;
nonvolatile memory communicatively coupled to the processor; and
logic communicatively coupled to the processor and the nonvolatile memory to:
attempt to program data in a first portion of the nonvolatile memory,
store the data in a cache of the nonvolatile memory prior to the attempt,
determine if the attempt was successful,
determine if the data stored in the cache of the nonvolatile memory is valid prior to recovery of the data, and
recover the data from the cache of the nonvolatile memory to a second portion of the nonvolatile memory with an internal data move operation if the attempt is determined to be not successful.

2. The system of claim 1 , wherein the logic is further to:
move the data from the cache of the nonvolatile memory to a temporary location of the nonvolatile memory with the internal data move operation; and
recover the data from the temporary location of the nonvolatile memory to the second portion of the nonvolatile memory with the internal data move operation.

3. The system of claim 2 , wherein the logic is further to:
move previously programmed data from the first portion of the nonvolatile memory to the second portion of the nonvolatile memory with the internal data move operation if the attempt is determined to be not successful.

4. The system of claim 1 , wherein the nonvolatile memory comprises a NAND memory.

5. A semiconductor package apparatus, comprising:
one or more substrates; and
logic coupled to the one or more substrates, wherein the logic is at least partly implemented in one or more of configurable logic and fixed-functionality hardware logic, the logic coupled to the one or more substrates to:
attempt to program data in a first portion of a nonvolatile memory,
store the data in a cache of the nonvolatile memory prior to the attempt,
determine if the attempt was successful,
determine if the data stored in the cache of the nonvolatile memory is valid prior to recovery of the data, and
recover the data from the cache of the nonvolatile memory to a second portion of the nonvolatile memory with an internal data move operation if the attempt is determined to be not successful.

6. The apparatus of claim 5 , wherein the logic is further to:
move the data from the cache of the nonvolatile memory to a temporary location of the nonvolatile memory with the internal data move operation; and
recover the data from the temporary location of the nonvolatile memory to the second portion of the nonvolatile memory with the internal data move operation.

7. The apparatus of claim 6 , wherein the logic is further to:
move previously programmed data from the first portion of the nonvolatile memory to the second portion of the nonvolatile memory with the internal data move operation if the attempt is determined to be not successful.

8. The apparatus of claim 5 , wherein the nonvolatile memory comprises a NAND memory.

9. A method of recovering data, comprising:
attempting to program data in a first portion of a nonvolatile memory;
storing the data in a cache of the nonvolatile memory prior to the attempt;
determining if the attempt was successful;
determining if the data stored in the cache of the nonvolatile memory is valid prior to recovery of the data; and
recovering the data from the cache of the nonvolatile memory to a second portion of the nonvolatile memory with an internal data move operation if the attempt is determined to be not successful.

10. The method of claim 9 , further comprising:
moving the data from the cache of the nonvolatile memory to a temporary location of the nonvolatile memory with the internal data move operation; and
recovering the data from the temporary location of the nonvolatile memory to the second portion of the nonvolatile memory with the internal data move operation.

11. The method of claim 10 , further comprising:
moving previously programmed data from the first portion of the nonvolatile memory to the second portion of the nonvolatile memory with the internal data move operation if the attempt is determined to be not successful.

12. The method of claim 9 , wherein the nonvolatile memory comprises a NAND memory.

13. At least one computer readable medium, comprising a set of instructions, which when executed by a computing device, cause the computing device to:
attempt to program data in a first portion of a nonvolatile memory;
store the data in a cache of the nonvolatile memory prior to the attempt;
determine if the attempt was successful;
determine if the data stored in the cache of the nonvolatile memory is valid prior to recovery of the data; and
recover the data from the cache of the nonvolatile memory to a second portion of the nonvolatile memory with an internal data move operation if the attempt is determined to be not successful.

14. The at least one computer readable medium of claim 13 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:
move the data from the cache of the nonvolatile memory to a temporary location of the nonvolatile memory with the internal data move operation; and
recover the data from the temporary location of the nonvolatile memory to the second portion of the nonvolatile memory with the internal data move operation.

15. The at least one computer readable medium of claim 14 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:
move previously programmed data from the first portion of the nonvolatile memory to the second portion of the nonvolatile memory with the internal data move operation if the attempt is determined to be not successful.

16. The at least one computer readable medium of claim 13 , wherein the nonvolatile memory comprises a NAND memory.

Assignees

• Intel Corp

Inventors

• Natarajan Shankar
• Tran Wayne

Classifications

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G11C16/10

  Programming or data input circuits · CPC title

• G11C16/34

  Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention · CPC title

• G11C16/3463

  Circuits or methods to detect overprogrammed nonvolatile memory cells, usually during program verification · CPC title

• G06F3/0647

  Migration mechanisms · CPC title