Techniques for improved progressive mesh compression

US10657675B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10657675-B2
Application numberUS-201815913824-A
CountryUS
Kind codeB2
Filing dateMar 6, 2018
Priority dateMar 6, 2018
Publication dateMay 19, 2020
Grant dateMay 19, 2020

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  5. First independent claim

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Abstract

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An encoder includes a processor and a memory. The encoder generates a first plurality of levels of detail (LODs) and associated first type of vertex split records, each of the first type of vertex split records associated with an LOD of the first plurality of LODs is generated using a first type of collapse operator. The encoder initiates a switch from using the first type of collapse operator to a second type of collapse operator in response to a switching condition being satisfied. The encode further a second plurality of LODs and associated second type of vertex split records, each of the second type of vertex split records associated with a LOD of the second plurality of LODs is generated using the second type of collapse operator.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method of progressive mesh compression, comprising: generating, at an encoder, a first plurality of levels of detail (LODs) and associated first type of vertex split records, the first type of vertex split records associated with an LOD of the first plurality of LODs are generated using a first type of collapse operator; switching from using the first type of collapse operator to a second type of collapse operator in response to a switching condition being satisfied, the switching condition being based at least on identifying a branching point, to balance distortion and bits per vertex, from a plurality of branching points; and generating, at the encoder, after the switching, a second plurality of LODs and associated second type of vertex split records, the second type of vertex split records associated with a LOD of the second plurality of LODs are generated using the second type of collapse operator. 2. The method of claim 1 , further comprising: transmitting, from the encoder, in response to a message received from a decoder, a LOD of the first plurality of LODs and associated first type of vertex split records or a LOD of the second plurality of LODs and associated second type of vertex split records, wherein the LOD is a lowest LOD being requested from the decoder, and the vertex split records include vertex split records associated with the lowest LOD and vertex split records associated with LODs up to a highest LOD. 3. The method of claim 1 , wherein generating a LOD of the first plurality of LODs and associated first type of vertex split records includes: collapsing, using the first type of collapse operator, edges of a LOD immediately preceding the LOD being generated; and generating the associated vertex split records based on the collapsing. 4. The method of claim 1 , wherein generating a LOD of the second plurality of LODs and associated second type of vertex split records includes: collapsing, using the second type of collapse operator, edges of a LOD immediately preceding the LOD being generated; and generating the associated vertex split records based on the collapsing. 5. The method of claim 1 , wherein the first type of collapse operator is a full-edge collapse operator and the second type of collapse operator is a half-edge collapse operator. 6. The method of claim 1 , wherein the switching condition is based at least on one of a user-defined parameter or an error threshold. 7. The method of claim 1 , wherein the switching condition is based at least on identifying a branching point upon generating of the first LOD, the switching being triggered at the branching point. 8. The method of claim 1 , wherein the first type of collapse operator is a half-edge collapse operator and the second type of collapse operator is a full-edge collapse operator. 9. An encoder, comprising: a processor; and a memory, the memory including instructions configured to cause the processor to: generate a first plurality of levels of detail (LODs) and associated first type of vertex split records, the first type of vertex split records associated with an LOD of the first plurality of LODs are generated using a first type of collapse operator; switch from using the first type of collapse operator to a second type of collapse operator in response to a switching condition being satisfied, the switching condition being based at least on identifying a branching point, to balance distortion and bits per vertex, from a plurality of branching points; and generate, after the switching, a second plurality of LODs and associated second type of vertex split records, the second type of vertex split records associated with a LOD of the second plurality of LODs are generated using the second type of collapse operator. 10. The encoder of claim 9 , further comprising: transmitting, from the encoder, in response to a message received from a decoder, a LOD of the first plurality of LODs and associated first type of vertex split records or a LOD of the second plurality of LODs and associated second type of vertex split records, wherein the LOD is a lowest LOD being requested from the decoder, and the vertex split records include vertex split records associated with the lowest LOD and vertex split records associated with LODs up to a highest LOD. 11. The encoder of claim 9 , wherein generating a LOD of the first plurality of LODs and associated first type of vertex split records includes: collapsing, using the first type of collapse operator, edges of a LOD immediately preceding the LOD being generated; and generating the associated vertex split records based on the collapsing. 12. The encoder of claim 9 , wherein generating a LOD of the second plurality of LODs and associated second type of vertex split records includes: collapsing, using the second type of collapse operator, edges of a LOD immediately preceding the LOD being generated; and generating the associated vertex split records based on the collapsing. 13. The encoder of claim 9 , wherein the first type of collapse operator is a full-edge collapse operator and the second type of collapse operator is a half-edge collapse operator. 14. The encoder of claim 9 , wherein the switching condition is based at least on one of a user-defined parameter or an error threshold. 15. The encoder of claim 9 , wherein the switching condition is based at least on identifying a branching point upon generating of the first LOD, the switching being triggered at the branching point. 16. A non-transitory computer-readable storage medium having stored thereon computer executable program code which, when executed on a computer system, causes the computer system to perform a method, comprising: generating, at an encoder, a first plurality of levels of detail (LODs) and associated first type of vertex split records, the first type of vertex split records associated with an LOD of the first plurality of LODs are generated using a first type of collapse operator; switching from using the first type of collapse operator to a second type of collapse operator in response to a switching condition being satisfied, the switching condition being based at least on identifying a branching point, to balance distortion and bits per vertex, from a plurality of branching points; and generating, at the encoder, after the switching, a second plurality of LODs and associated second type of vertex split records, the second type of vertex split records associated with a LOD of the second plurality of LODs are generated using the second type of collapse operator. 17. The computer-readable storage medium of claim 16 , the method further comprising: transmitting, from the encoder, in response to a message received from a decoder, a LOD of the first plurality of LODs and associated first type of vertex split records or a LOD of the second plurality of LODs and associated second type of vertex split records, wherein the LOD is a lowest LOD being requested from the decoder, and the vertex split records include vertex split records associated with the lowest LOD and vertex split records associated with LODs up to a highest LOD. 18. The computer-readable storage medium of claim 16 , wherein generating a LOD of the first plurality of LODs and associated first type of vertex split records includes: collapsing, using the first type of collapse operator, edges of a LOD immediately preceding the LOD being generated; and generating the associated vertex split records based on the collapsing. 1

Assignees

Inventors

Classifications

  • G06T9/001Primary

    Model-based coding, e.g. wire frame · CPC title

  • Finite element generation, e.g. wire-frame surface description, {tesselation} · CPC title

  • Level of detail · CPC title

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What does patent US10657675B2 cover?
An encoder includes a processor and a memory. The encoder generates a first plurality of levels of detail (LODs) and associated first type of vertex split records, each of the first type of vertex split records associated with an LOD of the first plurality of LODs is generated using a first type of collapse operator. The encoder initiates a switch from using the first type of collapse operator …
Who is the assignee on this patent?
Google Llc
What technology area does this patent fall under?
Primary CPC classification G06T9/001. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 19 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).