Automated inspection system
US-2024420305-A1 · Dec 19, 2024 · US
US10657639B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10657639-B2 |
| Application number | US-201816033855-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 12, 2018 |
| Priority date | Sep 28, 2012 |
| Publication date | May 19, 2020 |
| Grant date | May 19, 2020 |
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Systems and methods for identifying defective individual packaged modules are presented. A Printed Circuit Board (PCB) having a set of individual module substrates can be received. Further, capturing an image of the PCB and loading a PCB recipe associated with the PCB can be performed. The image of the PCB can be captured by an image capture module that can include one or more cameras. For each individual module substrate, a portion of the image corresponding to the individual module substrate can be compared to the PCB recipe. In addition, it can be determined based on the comparison whether the individual module substrate matches the PCB recipe within a degree of tolerance. In response to determining that the individual module substrate does not match the PCB recipe within the degree of tolerance, a location of the individual module substrate within a map of the PCB can be stored.
Opening claim text (preview).
What is claimed is: 1. A method of identifying potentially defective individual packaged modules, the method comprising: receiving a Printed Circuit Board (PCB) including a set of individual module substrates; capturing an image of a first face of the PCB; determining, using the image, whether the set of individual module substrates includes potentially defective individual module substrates based on a first set of markings included on the potentially defective individual module substrates; and in response to determining that the set of individual module substrates includes potentially defective individual module substrates, creating a map of the marked individual module substrates based on the first set of markings, forming an overmold over at least a portion of the first face of the PCB, the overmold covering the first set of markings, and marking locations on the PCB corresponding to potentially defective individual module substrates to create a second set of markings, the locations identified via the map. 2. The method of claim 1 wherein the first set of markings and the second set of markings identify X-Outs. 3. The method of claim 1 wherein the first set of markings includes ink markings. 4. The method of claim 1 wherein the second set of markings includes ink markings. 5. The method of claim 1 further comprising counting the first set of markings thereby enabling tracking of PCB yield. 6. The method of claim 1 wherein marking locations on the PCB includes rotating the PCB so that a second face of the PCB faces an inking tool, the second face of the PCB opposite to the first face of the PCB. 7. The method of claim 1 wherein determining whether the set of individual module substrates includes potentially defective individual module substrates includes comparing the image to a PCB recipe associated with a PCB model of the PCB. 8. The method of claim 1 further comprising singulating the PCB into individual packaged modules and identifying potentially defective packaged modules based on the second set of markings. 9. The method of claim 1 wherein capturing an image of a first face of the PCB includes capturing multiple images of the first face of the PCB, each image corresponding to a different region of the first face. 10. The method of claim 1 further comprising identifying a PCB module of the PCB. 11. A system for identifying potentially defective individual packaged modules, the system comprising: a Printed Circuit Board (PCB) loader configured to load a PCB, the PCB including a set of individual module substrates; an image capture module configured to capture an image of a first face of the PCB; a processor configured to identify, using the image of the first face of the PCB, potentially defective individual module substrates of the PCB based on a first set of markings included on the potentially defective individual module substrates; a mapping module configured to create a map of the marked individual module substrates based on the first set of markings; an overmold module configured to form an overmold over at least a portion of the first face of the PCB, the overmold covering the first set of markings; and a marking module configured to mark locations on the PCB corresponding to potentially defective individual module substrates to create a second set of markings, the locations identified via the map. 12. The system of claim 11 wherein the first set of markings and the second set of markings identify X-Outs. 13. The system of claim 11 wherein the first set of markings includes ink markings. 14. The system of claim 11 wherein the second set of markings includes ink markings. 15. The system of claim 11 wherein the processor is further configured to count the first set of markings thereby enabling tracking of PCB yield. 16. The system of claim 11 wherein the marking module is further configured to rotate the PCB so that a second face of the PCB faces an inking tool of the marking module, the second face of the PCB opposite to the first face of the PCB. 17. The system of claim 11 further comprising a PCB recipe loader configured to load a PCB recipe corresponding to a PCB model of the PCB. 18. The system of claim 17 wherein the processor is further configured to compare the image of the first face of the PCB to the PCB recipe to identify potentially defective individual module substrates of the PCB based on the first set of markings. 19. The system of claim 11 further comprising a singulator configured to singulate the PCB into individual packaged modules. 20. The system of claim 19 wherein the singulator is further configured to identify potentially defective individual packaged modules based on the second set of markings.
using an image reference approach · CPC title
Printed circuit board [PCB] · CPC title
Microscopic image · CPC title
Conductor · CPC title
Controlling of component placement on the substrate during or after manufacturing · CPC title
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