Method and system for forming compute clusters using block chains

Patent metadata

Field	Value
Publication number	US-10652319-B2
Application number	US-201514971342-A
Country	US
Kind code	B2
Filing date	Dec 16, 2015
Priority date	Dec 16, 2015
Publication date	May 12, 2020
Grant date	May 12, 2020

Abstract

A system for data processing is disclosed that includes a computing cluster allocation system operating on a processor and configured to receive a work project, to segment the work project into a plurality of tasks and to distribute the plurality of tasks to a plurality of anonymous computing units using a block chain algorithm, and a computing cluster monitor system operating on the processor and configured to receive data associated with the plurality of tasks from the computing cluster allocation and response data from the anonymous computing units and to determine whether the project has been completed.

First claim

What is claimed is:

1. A system for data processing, comprising:
a computing cluster allocation system operating on a hardware processor and configured to receive a work project, to segment the work project into a plurality of tasks and to distribute the plurality of tasks to a plurality of anonymous computing units using a block chain algorithm;
a computing cluster monitor system operating on the hardware processor and configured to receive data associated with the plurality of tasks the computing cluster allocation system and response data from the anonymous computing units, to determine whether the project has been completed, and to cause the computing cluster allocation system to distribute one or more of the plurality of tasks to a second plurality of anonymous computing units if it is determined that the project has not been completed; and
a work package interface operating on the hardware processor and configured to receive work package data from a user including each of hardware processor speed and hardware processor security level and each of an algorithm selection and an anonymous computing unit hardware processor characteristic and to apply the algorithm selection and the anonymous computing unit hardware processor characteristic to the plurality of anonymous computing units that will process the work package as a function of the hardware processor speed and the hardware processor security level of the anonymous computing level hardware processors to 1) determine latency statistics as a function of hardware processor speed, data storage size and hardware processor location of each anonymous computing unit from the response data, to further determine a response time characteristic for the anonymous computing units using the hardware processor, 2) increase a number of anonymous computing units that are to be assigned a task in response to the determined latency statistics indicating that a response time will not be met, and 3) to decrease a number of anonymous computing units that are to be assigned a task in response to the determined latency statistics indicating that a response time will be exceeded.

2. The system of claim 1 further comprising a latency statistics system operating on the hardware processor and configured to receive the response data from the anonymous computing units and to determine latency statistics for determining a response time characteristic for the anonymous computing units as a function of location, hardware processor size and data storage capacity and to increase or decrease a number of anonymous computing units that are to be assigned a task as a function of a delivery date.

3. The system of claim 1 further comprising a duplicate deletion system operating on the hardware processor and configured to receive the response data from the anonymous computing units and to delete duplicate results for one of the plurality of tasks after verifying that a result associated with the response data is the same and updating the latency statistics using the duplicate results.

4. The system of claim 1 further comprising a set up and completion system operating on the hardware processor and configured to receive data associated with the plurality of tasks and to perform set up work that is required to configure the plurality of tasks and completion work that is required to complete the work project after the plurality of tasks have been completed by determining whether a predetermined number of uncompleted tasks remains and to assign duplicate tasks to other anonymous computing units as a function of updated latency statistics.

5. The system of claim 1 further comprising an algorithm segment system operating on the hardware processor and configured to receive a data set and latency statistics and to identify first algorithmic processes that can be performed in parallel and second algorithmic processes that can be performed in series for the data set using a block chain communication process as a function of the data set and the latency statistics.

6. The system of claim 1 further comprising a data segment system operating on the hardware processor and configured to receive a data set and to segment the data set for use with distributed anonymous computing units as a function of progress of each segment of the segmented data set and a plurality of estimated hardware processor speeds and estimated data memory sizes of the anonymous computing units.

7. The system of claim 1 further comprising a results assembly system operating on the hardware processor and configured to receive data processing results from distributed anonymous computing units, to map the data processing results to a task template and to assemble the results into a results package as a function of resubmission of a work package.

8. The system of claim 1 further comprising a results delivery system operating on the hardware processor and configured to schedule delivery of a results package generated by a plurality of anonymous computing units to a plurality of different recipients.

9. A method for data processing, comprising:
receiving a work project by a computing cluster allocation system operating at a hardware processor;
receiving, by a work package interface operating on the hardware processor, work package data from a user including each of hardware processor speed and hardware processor security level and each of an algorithm selection and an anonymous computing unit hardware processor characteristic;
applying, by the work package interface, the algorithm selection and the anonymous computing unit hardware processor characteristic to the plurality of anonymous computing units that will process the work package as a function of the hardware processor speed and the hardware processor security level of the anonymous computing level hardware processors;
segmenting, by the computing cluster allocation system, the work project with the hardware processor into a plurality of tasks;
distributing, by the computing cluster allocation system, the plurality of tasks to a plurality of anonymous computing units using a block chain algorithm;
receiving, by a computing cluster monitor system operating at the hardware processor, data associated with the plurality of tasks from the computing cluster allocation system and response data from the anonymous computing units at the hardware processor;
determining, by the computing cluster monitor system, whether the work project has been completed and to cause the computing cluster to distribute one or more of the plurality of tasks to a second plurality of anonymous computing units in response to the determination that the project has not been completed;
determining latency statistics as a function of hardware processor speed, data storage size and hardware processor location of each anonymous computing unit from the response data, for determining a response time characteristic for the anonymous computing units using the hardware processor;
increasing a number of anonymous computing units that are to be assigned a task in response to the determined latency statistics indicating that a response time will not be met; and
decreasing the number of anonymous computing units that are to be assigned the task in response to the determined latency statistics indicating that a response time will be exceeded.

10. The method of claim 9 further comprising:
receiving the response data from the anonymous computing units at the hardware processor;
determining whether two or more responses for each of a plurality of tasks are duplicates received from different anonymous computing units for two or more classes of anonymous computing units as a function of hardware processor speed, data storage size and hardwa

Assignees

• Dell Products Lp

Inventors

• Ford Daniel A
• Cheng Zhuoqun

Classifications

• H04L67/1008 Primary

  based on parameters of servers, e.g. available memory or workload (monitoring of computer activity G06F11/30) · CPC title

• H04L43/087

  Jitter · CPC title

• Y04S40/168

  Cross-Sectional Technologies · mapped topic

• H04L41/0896

  Bandwidth or capacity management, i.e. automatically increasing or decreasing capacities (flow or congestion control using dynamic resource allocation, e.g. in-call renegotiation, H04L47/76) · CPC title

• Y04S40/162

  Cross-Sectional Technologies · mapped topic