Fast settling capacitive gain amplifier circuit
US-2018076780-A1 · Mar 15, 2018 · US
US10651797B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10651797-B2 |
| Application number | US-201815948398-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 9, 2018 |
| Priority date | Apr 9, 2018 |
| Publication date | May 12, 2020 |
| Grant date | May 12, 2020 |
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An apparatus includes a first amplifier, a second amplifier, and a compensation-setting generator to generate a first amplifier compensation setting and second amplifier compensation setting. A controller is operable to: i) apply the first amplifier compensation setting to the first amplifier and apply the second amplifier compensation setting to the second amplifier. The controller is further operable to switch between generating updates to the first amplifier compensation setting and the second amplifier compensation setting.
Opening claim text (preview).
We claim: 1. An apparatus comprising: a first amplifier operable to receive a first signal; a second amplifier operable to receive a second signal; a compensation-setting generator operable to: i) receive the first signal inputted to the first amplifier, ii) derive a first differential compensation setting from the first signal, iii) receive the second signal inputted to the second amplifier, and iv) derive a second differential compensation setting from the second signal; and a controller operable to: i) apply the first differential compensation setting to the first amplifier and apply the second differential compensation setting to the second amplifier, and ii) switch between generating updates to the first differential compensation setting applied to the first amplifier and the second differential compensation setting applied to the second amplifier. 2. The apparatus as in claim 1 , wherein the controller is further operable to, in different time slots, switch between controlling the compensation-setting generator to generate the updates to the first differential compensation setting and the second differential compensation setting. 3. The apparatus as in claim 1 , wherein both the first amplifier and the second amplifier operate in a continuous amplification mode of amplifying a respective received signal while the compensation-setting generator generates the first differential compensation setting and the second differential compensation setting. 4. The apparatus as in claim 1 , wherein the first differential compensation setting corrects an input offset voltage associated with the first amplifier; and wherein the second differential compensation setting corrects an input offset voltage associated with the second amplifier. 5. The apparatus as in claim 1 further comprising: a first compensator operable to provide first compensation to the first amplifier based on the first differential compensation setting; a second compensator operable to provide second compensation to the second amplifier based on the second differential compensation setting; wherein the first amplifier is a first multistage amplifier including a respective first amplifier stage coupled to drive a respective second amplifier stage, the first compensator operable to apply the first differential compensation setting to at least one node coupling the respective first amplifier stage to the respective second amplifier stage of the first amplifier; and wherein the second amplifier is a second multistage amplifier including a corresponding first amplifier stage coupled to drive a corresponding second amplifier stage of the second amplifier, the second compensator operable to apply the second differential compensation setting to at least one node coupling the corresponding first amplifier stage to the corresponding second amplifier stage of the second amplifier. 6. The apparatus as in claim 5 , wherein the first compensator is a transconductance amplifier operable to produce a first differential correction signal applied to first differential nodes coupling the respective first stage of the first amplifier to the respective second stage of the first amplifier; and wherein the second compensator is a transconductance amplifier operable to produce a second differential correction signal applied to second differential nodes coupling the corresponding first stage of the second amplifier to the corresponding second stage of the second amplifier. 7. The apparatus as in claim 1 , wherein the compensation-setting generator operable to repeatedly generate and update the first differential compensation setting and the second differential compensation setting in accordance with a cyclical time slot schedule. 8. The apparatus as in claim 7 , wherein the cyclical time slot schedule is implemented based at least in part on a control signal operable to control generation of an output voltage from a power converter. 9. The apparatus as in claim 1 , wherein the controller is further operable to: i) selectively couple the first signal to an input to the compensation-setting generator to produce the first differential compensation setting, and ii) selectively couple the second signal to the compensation-setting generator to produce the second differential compensation setting. 10. The apparatus as in claim 1 , wherein the controller, when generating the first differential compensation setting, is operable to: electrically decouple the compensation-setting generator from the second amplifier, and ii) electrically couple the compensation-setting generator to an input of the first amplifier receiving the first signal; and wherein the controller, when generating the second differential compensation setting, is operable to: electrically decouple the compensation-setting generator from the first amplifier, and ii) electrically couple the compensation-setting generator to an input of the second amplifier receiving the second signal. 11. The apparatus as in claim 1 further comprising: a first compensator operable to provide first compensation to the first amplifier based on the first differential compensation setting; a second compensator operable to provide second compensation to the second amplifier based on the second differential compensation setting; wherein the first compensator includes: i) a first storage circuit operable to store the first differential compensation setting, and ii) a first transconductance compensation amplifier operable to drive the first amplifier with a first differential correction signal whose magnitude depends on a magnitude of the first differential compensation setting stored in the first storage circuit; and wherein the second compensator includes: i) a second storage circuit operable to store the second differential compensation setting, and ii) a second transconductance compensation amplifier operable to drive the second amplifier with a second differential correction signal whose magnitude depends on a magnitude of the second differential compensation setting stored in the second storage circuit. 12. The apparatus as in claim 11 further comprising: wherein the compensation-setting generator includes an offset compensator, a transconductance amplifier stage, and a third storage circuit; wherein the third storage circuit is operable to store a third differential compensation setting derived by the transconductance amplifier stage of the compensation-setting generator, the transconductance amplifier stage of the compensation-setting generator operable to output a correction signal whose magnitude depends on a magnitude of the third differential compensation setting stored in the third storage circuit. 13. The apparatus as in claim 1 further comprising: a first compensator operable to generate a first correction signal based on the first differential compensation setting, the first compensator providing input offset voltage correction to the first amplifier via application of the first differential correction signal to a respective output node of the first amplifier; and a second compensator operable to generate a second correction signal based on the second differential compensation setting, the second compensator providing input offset voltage correction to the second amplifier via application of the second correction signal to a corresponding output node of the second amplifier. 14. A method comprising: deriving a first differential compensation setting from a first signal inputted to a first amplifier; deriving a second differential compensation setting from a second signal inputted to a second amplifier; applying the firs
Continuous control · CPC title
in integrated circuits · CPC title
and using digital means · CPC title
Circuitry to compensate the offset being present in an amplifier · CPC title
using switching means, e.g. sample and hold · CPC title
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