Bridge driver for a switching voltage regulator which is operable to soft-switch and hard-switch

US10651733B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10651733-B2
Application numberUS-201514810385-A
CountryUS
Kind codeB2
Filing dateJul 27, 2015
Priority dateJun 27, 2012
Publication dateMay 12, 2020
Grant dateMay 12, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Described is an apparatus which comprises: a low-side switch coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage. Described is also a voltage regulator which comprises: a signal generator to generate a pulse-width modulated (PWM) signal; a bridge having a low-side switch coupled to an output node for providing regulated voltage supply according to the PWM signal; a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage; and a bridge controller to provide control signals to the first driver. The voltage regulator may operate without diode clamps and its operation is self-timed. The voltage regulator also provides tolerance against process variation.

First claim

Opening claim text (preview).

We claim: 1. An apparatus comprising: a low-side switch having a first transistor with the low-side switch being coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage of the first transistor of the low-side switch, wherein the first driver comprises an n-type driver, the n-type driver comprising a zero-voltage switching (ZVS) catch circuit which is operable to indirectly sense a voltage on the output node to turn on the low-side switch, a zero-current switching (ZCS) release circuit couple with the ZVS catch circuit by a transistor which is operable to indirectly sense a voltage on the output node to turn off the low-side switch, and an end pre-charge circuit to pre-charge a node driving the low-side switch. 2. The apparatus of claim 1 further comprises: a high-side switch coupled to the output node; and a second driver operable to cause the high-side switch to turn on when either the output node reaches a second transistor threshold voltage or when a control signal causes the high-side switch to turn on. 3. The apparatus of claim 2 , wherein the high-side switch comprises a cascode device including a first p-type transistor coupled to the output node and a second p-type transistor, wherein the second p-type transistor is driven by the second driver according to a voltage level on a node coupling the first p-type transistor to the second p-type transistor. 4. The apparatus of claim 3 , wherein the second transistor threshold voltage corresponds to a threshold voltage of the first p-type transistor. 5. The apparatus of claim 1 , wherein the first driver operable to cause the low-side switch to turn on when the output node is substantially close to zero volts. 6. The apparatus of claim 1 , wherein the low-side switch comprises a cascode device including the first transistor which is a first n-type transistor coupled to the output node and a second n-type transistor, wherein the second n-type transistor is driven by the first driver according to a voltage level on a node coupling the first n-type transistor to the second n-type transistor. 7. The apparatus of claim 6 , wherein the first transistor threshold voltage corresponds to a threshold voltage of the first n-type transistor. 8. The apparatus of claim 1 , wherein the pre-charge circuit is operable to raise or keep substantially constant a voltage on the node driving the low-side switch to a voltage between ground and a threshold voltage of a transistor of the low-side switch. 9. The apparatus of claim 1 , wherein the first driver comprises an end-pre-charge circuit to terminate the operation of the pre-charge circuit. 10. The apparatus of claim 2 , wherein the second driver comprises a pre-charge circuit to pre-charge a node driving the high-side switch. 11. The apparatus of claim 10 , wherein the pre-charge circuit is operable to lower or keep substantially constant a voltage on the node driving the high-side switch to a voltage between power supply and a threshold voltage of a transistor of the high-side switch. 12. The apparatus of claim 10 , wherein the second driver comprises an end-pre-charge circuit to terminate the operation of the pre-charge circuit. 13. The apparatus of claim 1 , wherein the output node is coupled to one end of an inductor which has another end coupled to a capacitor. 14. The apparatus of claim 13 , wherein the other end coupled to the capacitor to provide regulated voltage supply to a circuit. 15. A voltage regulator comprising: a signal generator to generate a pulse-width modulated (PWM) signal; a bridge having a low-side switch that includes a first transistor with the low-side switch being coupled to an output node for providing regulated voltage supply according to the PWM signal; a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage of the first transistor of the low-side switch, wherein the first driver comprises an n-type driver, the n-type driver comprising a zero-voltage switching (ZVS) catch circuit which is operable to indirectly sense a voltage on the output node to turn on the low-side switch, a zero-current switching (ZCS) release circuit couple with the ZVS catch circuit by a transistor which is operable to indirectly sense a voltage on the output node to turn off the low-side switch, and an end pre-charge circuit to pre-charge a node driving the low-side switch; and a bridge controller to provide control signals to the first driver. 16. The voltage regulator of claim 15 , wherein the bridge comprises: a high-side switch coupled to the output node. 17. The voltage regulator of claim 16 further comprises: a second driver operable to cause the high-side switch to turn on when either the output node reaches a second transistor threshold voltage or when a control signal causes the high-side switch to turn on. 18. The voltage regulator of claim 16 , wherein the bridge controller to provide control signals to the second driver. 19. The voltage regulator of claim 17 , wherein the high-side switch comprises a cascode device including a first p-type transistor coupled to the output node and a second p-type transistor, wherein the second p-type transistor is driven by the second driver according to a voltage level on a node coupling the first p-type transistor to the second p-type transistor. 20. A system comprising: a wireless interface; and a processor, capable of communicating directly or indirectly with another device via the wireless interface, the processor including a voltage regulator, a low-side switch having a first transistor with the low-side switch being coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage of the first transistor of the low-side switch, wherein the first driver comprises an n-type driver, the n-type driver comprising a zero-voltage switching (ZVS) catch circuit which is operable to indirectly sense a voltage on the output node to turn on the low-side switch, a zero-current switching (ZCS) release circuit couple with the ZVS catch circuit by a transistor which is operable to indirectly sense a voltage on the output node to turn off the low-side switch, and an end pre-charge circuit to pre-charge a node driving the low-side switch. 21. The system of claim 20 , wherein the voltage regulator further comprises: a high-side switch coupled to the output node; and a second driver operable to cause the high-side switch to turn on when either the output node reaches a second transistor threshold voltage or when a control signal causes the high-side switch to turn on. 22. The system of claim 20 further comprises a memory coupled to the processor, wherein the processor comprises a plurality of hardware processing cores, and wherein at least one hardware processing core is coupled to the memory. 23. An apparatus comprising: an end pre-charge circuit, upon activation, to pre-charge a node driving a low-side switch device of a voltage regulator; an output node coupled to the low-side switch device, the low-side switch device to turn on when the output node transitions from an input voltage supply level to a voltage supply level between half of the input voltage sup

Assignees

Inventors

Classifications

  • H02M3/1588Primary

    comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence) · CPC title

  • in a self-oscillating arrangement (H02M3/337 takes precedence) · CPC title

  • H02M3/158Primary

    including plural semiconductor devices as final control devices for a single load · CPC title

  • Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • Cross-Sectional Technologies · mapped topic

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What does patent US10651733B2 cover?
Described is an apparatus which comprises: a low-side switch coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage. Described is also a voltage regulator which comprises: a signal generator to generate a pulse-width modulated (PWM) signal; a brid…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H02M3/1588. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 12 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).