Dynamic garbage collection P/E policies for redundant storage blocks and distributed software stacks

Patent metadata

Field	Value
Publication number	US-10649681-B2
Application number	US-201615133205-A
Country	US
Kind code	B2
Filing date	Apr 19, 2016
Priority date	Jan 25, 2016
Publication date	May 12, 2020
Grant date	May 12, 2020

Abstract

A Solid State Drive (SSD) (110) is disclosed. The SSD (110) may include storage (218) for data, and reception circuitry (203) to receive various instructions and data. The reception circuitry (203) may receive an instruction (257) from a host machine (105) to perform garbage collection, along with a selected P/E strategy (260). The SSD (110) may include garbage collection logic (209) to perform garbage collection, possibly with a delayed Program operation if an adaptive P/E strategy (1110) is selected. The SSD (110) may also include a mapping table (221) that may identify which pages were not Programmed before victim blocks (233, 236) were erased, and therefore require replication during a delayed Program operation.

First claim

What is claimed is:

1. A Solid State Drive (SSD), comprising: storage for data; reception circuitry to receive an instruction from a host machine to perform garbage collection, the instruction including a Program/Erase (P/E) strategy to be used by the SSD, the P/E strategy to be used by the SSD being one of at least a default P/E strategy and an adaptive P/E strategy; garbage collection logic to perform garbage collection responsive to the reception circuitry receiving the instruction to perform garbage collection, the garbage collection logic including a Program logic to perform a Program operation during garbage collection according to the P/E strategy, the garbage collection logic implementing at least the default P/E strategy and the adaptive P/E strategy; and a mapping table to identify at least one page in a victim block for later fetching from a replicated copy on a second storage device; wherein based at least in part on the instruction including the adaptive P/E strategy, the Program logic is operative to mark, in the mapping table, the at least one page in a victim block on the SSD for fetching from a replicated copy from the second storage device without copying the at least one page to a second block on the SSD before erasing the victim block.

2. An SSD according to claim 1 , wherein responsive to the reception circuitry receiving a write request from a client machine, the Program logic is operative to cache the replicated copy of the at least one page from the second storage device to a memory on the SSD, to modify the cached copy of the at least one page in the memory responsive to the write request, and to write the modified copy of the at least one page to the second block on the SSD.

3. An SSD according to claim 1 , wherein based at least in part on the adaptive P/E strategy being used, the Program logic is operative to copy the replicated copy of the at least one page from the second storage device to the second block on the SSD when an 1/0 load on the host machine is below a load threshold.

4. An SSD according to claim 1 , wherein based at least in part on the adaptive P/E strategy being used, the Program logic is operative to copy the replicated copy of the at least one page from the second storage device to the second block on the SSD after a time threshold has passed.

5. An SSD according to claim 1 , wherein based at least in part on no replicated copy of the at least one page exists on the second storage device, the Program logic is operative to copy the at least one page from the victim block to the second block on the SSD before erasing the victim block despite the P/E strategy being the adaptive P/E strategy.

6. A Solid State Drive (SSD), comprising: storage for data; reception circuitry to receive an instruction from a host machine to perform garbage collection, the instruction including a Program/Erase (P/E) strategy to be used by the SSD, the P/E strategy to be used by the SSD being one of at least a default P/E strategy and an adaptive P/E strategy; garbage collection logic to perform garbage collection responsive to the reception circuitry receiving the instruction to perform garbage collection, the garbage collection logic including a Program logic to perform a Program operation during garbage collection according to the P/E strategy, the garbage collection logic implementing at least the default P/E strategy and the adaptive P/E strategy; Dynamic Random Access Memory (RAM) to cache a copy of the at least one page in the victim block on the SSD; and a SSD controller operative that, based at least in part on the instruction including the adaptive P/E strategy-being-used, is operative to copy the at least one page from the victim block to a cached copy in the Dynamic RAM before erasing the victim block and to copy the cached copy to the second block after erasing the victim block without copying the at least one page to a second block on the SSD before erasing the victim block.

7. An SSD according to claim 6 , wherein based at least in part on the adaptive P/E strategy being used, the Program logic is operative to copy the cached copy of the at least one page from the Dynamic RAM to the second block on the SSD when an 1/0 load on the host machine is below a load threshold.

8. An SSD according to claim 6 , wherein based at least in part on the adaptive P/E strategy being used, the Program logic is operative to copy the cached copy of the at least one page from the Dynamic RAM to the second block on the SSD after a time threshold has passed.

9. An SSD according to claim 6 , wherein based at least in part on no replicated copy of the at least one page exists on a second storage device, the Program logic is operative to copy the at least one page from the victim block to the second block on the SSD before erasing the victim block despite the P/E strategy being the adaptive P/E strategy.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Suhas
• BATRAHALLI Ashwini
• Suri Tameesh

Classifications

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0652 Primary

  Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket · CPC title

• G06F3/0608

  Saving storage space on storage systems · CPC title

• H04L67/1097

  for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS] · CPC title

• G06F3/0611 Primary

  in relation to response time · CPC title