Dual-port non-volatile dual in-line memory modules

US10649680B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10649680-B2
Application numberUS-201515540237-A
CountryUS
Kind codeB2
Filing dateApr 30, 2015
Priority dateApr 30, 2015
Publication dateMay 12, 2020
Grant dateMay 12, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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According to an example, a dual-port non-volatile dual in-line memory module (NVDIMM) includes a first port to provide a central processing unit (CPU) with access to universal memory of the dual-port NVDIMM and a second port to provide an external NVDIMM manager circuit with access to the universal memory of the dual-port NVDIMM. Accordingly, a media controller of the dual-port NVDIMM may store data received from the CPU through the first port in the universal memory, control dual-port settings received from the CPU, and transmit the stored data to the NVDIMM manager circuit through the second port of the dual-port NVDIMM.

First claim

Opening claim text (preview).

What is claimed is: 1. A dual-port non-volatile dual in-line memory module (NVDIMM), comprising: a first port to provide a first central processing unit (CPU) of a first server with local, wherein the universal memory is non-volatile; a second port to provide an external NVDIMM manager circuit of the first server with local access to the universal memory of the dual-port NVDIMM, the first port and the second port allowing simultaneous access to the universal memory, wherein the external NVDIMM manager circuit interfaces with a remote storage device via a fabric interface chip of the NVDIMM manager circuit using network connections to the remote storage communicatively connected by a network memory fabric; and a media controller integrated within the dual-port NVDIMM having direct memory access (DMA) to the universal memory, the media controller to: control access to the universal memory by the first CPU via the first port and by the NVDIMM manager circuit via the second port; store first data received from the first CPU through the first port of the dual-port NVDIMM in the universal memory, control dual-port settings for the dual-port NVDIMM received from the first CPU through the first port of the dual-port NVDIMM, wherein the dual-port settings include at least one of an active-active redundancy flow and an active-passive redundancy flow, retrieve the first data from the universal memory and provide the retrieved first data to the NVDIMM manager circuit through the second port of the dual-port NVDIMM for transmission to the remote storage device, and store second data received, via the NVDIMM manager circuit, from a remote server into the universal memory using the second port of the dual-port NVDIMM. 2. The dual-port NVDIMM of claim 1 , wherein, responsive to a control request to the dual-port NVDIMM from the first CPU through the first port, controlling the dual-port settings to be the active-active redundancy flow, the media controller is to set both the first port and the second port of the dual-port NVDIMM to an active state to configure the first port as an active first port and the second port as an active second port so that the first CPU and the external NVDIMM manager circuit can simultaneously access the universal memory of the dual-port NVDIMM. 3. The dual-port NVDIMM of claim 2 , wherein the media controller comprises an integrated direct memory access (DMA) engine to migrate the stored first data to the external NVDIMM manager circuit through the active second port of the dual-port NVDIMM for replication to the remote storage device. 4. The dual-port NVDIMM of claim 3 , wherein the integrated DMA engine is to replicate based on a configuration setting by: automatically replicating the first data to the remote storage device through the active second port of the dual-port NVDIMM and the external NVDIMM manager circuit in real-time; or retrieving the first data from the universal memory at a predetermined time to transmit to the external NVDIMM manager circuit through the active second port of the dual-port NVDIMM for replication to the remote storage device. 5. The dual-port NVDIMM of claim 1 , wherein, responsive to a control request to the dual-port NVDIMM from the first CPU through the first port, controlling the dual-port settings to be the active-passive redundancy flow, the media controller is to set the first port of the dual-port NVDIMM to an active state to configure an active first port so that the CPU can actively access the dual-port NVDIMM and set the second port of the dual-port NVDIMM to a passive state to configure a passive second port and to designate the external NVDIMM manager circuit as a standby failover server. 6. The dual-port NVDIMM of claim 5 , wherein the media controller is to: receive a request from an external DMA engine, which is integrated with the external NVDIMM manager circuit, to retrieve the first data from the universal memory at a predetermined time through the passive second port of the dual-port NVDIMM; and transmit the first data to the external NVDIMM manager circuit through the passive second port of the dual-port NVDIMM to create an offline copy of the first data in the remote storage device. 7. The dual-port NVDIMM of claim 1 , wherein the media controller is to restore additional data received from the second port of the dual-port NVDIMM in the universal memory for access by a second CPU of the first server performing as a replica memory application server. 8. The dual-port NVDIMM of claim 1 , wherein the media controller is to transmit the first data, via the external NVDIMM manager circuit, to the remote storage device, wherein the remote storage device comprises at least one of a memory array server, a replica memory application server, and persistent storage within an interconnect, and wherein the remote storage device is external to the first server performing as an application memory server including the media controller and the first CPU. 9. A method to facilitate high-availability capabilities using a dual-port non-volatile dual in-line memory module (NVDIMM) of a server, comprising: storing, by a media controller integrated within the dual-port NVDIMM having direct, wherein the universal memory is non-volatile, received from a first central processing unit (CPU) through a first port of the dual-port NVDIMM, in the universal memory, the first CPU local to the server; controlling, by the media controller, dual-port settings for the dual-port NVDIMM received from the first CPU through the first port of the dual-port NVDIMM; and retrieving, by the media controller, the first data from the universal memory and providing, by the media controller, the retrieved first data to an external NVDIMM manager circuit of the server through a second port of the dual-port NVDIMM for replication to remote storage via a fabric interface chip of the NVDIMM manager circuit using network connections to the remote storage communicatively connected by a network memory fabric; and storing, by the media controller, second data received, via the NVDIMM manager circuit, from a remote server into the universal memory using the second port, wherein the first port and the second port allow simultaneous access to the universal memory. 10. The method of claim 9 , wherein a direct memory access (DMA) engine is integrated with the media controller of the dual-port NVDIMM, and wherein controlling the dual-port settings further comprises setting both the first port and the second port of the dual-port NVDIMM to an active state to configure an active first port and an active second port so that the first CPU and NVDIMM manager circuit can simultaneously access the universal memory of the dual-port NVDIMM. 11. The method of claim 10 , wherein retrieving and providing the first data to the external NVDIMM manager circuit is based on a configuration setting to: automatically transmit, in real-time, the first data through the active second port of the dual-port NVDIMM to the external NVDIMM manager circuit for replication to a remote storage, or transmit, at a predetermined trigger time, the first data from the universal memory through the active second port of the dual-port NVDIMM to the external NVDIMM manager circuit for replication to the remote storage. 12. The method of claim 9 , wherein an external DMA engine is integrated with the external NVDIMM manager circuit, and wherein controlling the dual-port settings further comprises setting the first port of the dual-port NVDIMM to an active state to configure an active first port so that the first CPU can actively access the dual-port NVDIMM and setting the second port of the dual-port

Assignees

Inventors

Classifications

  • Failover techniques · CPC title

  • Solving problems relating to consistency · CPC title

  • G06F3/065Primary

    Replication mechanisms · CPC title

  • Address space sharing · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

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What does patent US10649680B2 cover?
According to an example, a dual-port non-volatile dual in-line memory module (NVDIMM) includes a first port to provide a central processing unit (CPU) with access to universal memory of the dual-port NVDIMM and a second port to provide an external NVDIMM manager circuit with access to the universal memory of the dual-port NVDIMM. Accordingly, a media controller of the dual-port NVDIMM may store…
Who is the assignee on this patent?
Hewlett Packard Entpr Dev Lp
What technology area does this patent fall under?
Primary CPC classification G06F3/065. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 12 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).