High precision, high resolution collimating shadow mask and method for fabricating a micro-display

US10644239B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10644239-B2
Application numberUS-201514941825-A
CountryUS
Kind codeB2
Filing dateNov 16, 2015
Priority dateNov 17, 2014
Publication dateMay 5, 2020
Grant dateMay 5, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The method for producing an OLED micro-display on a silicon wafer uses a collimating shadow mask formed on a silicon substrate. The mask is fabricated by depositing a material layer on the front side and on the back side of the substrate and etching a portion of the layer on the back side of the substrate to a reduced thickness of at least 20 microns. At least one opening is created in the etched portion of the substrate. The substrate beneath the opening is removed to create the mask. The mask is situated at a location spaced from the surface of the silicon wafer and exposed to a linear evaporation source. Organic layers are then deposited on the silicon wafer in a location aligned with the mask opening.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: (1) patterning a first layer disposed on a first surface of a silicon substrate to define a first mask, wherein the first layer consists of silicon nitride and the silicon substrate consists of silicon; (2) etching the silicon substrate through the first mask to form a first region that defines a silicon membrane, wherein the silicon substrate has a first thickness outside the first region and a second thickness within the first region, and wherein the second thickness is less than the first thickness and is equal to or greater than 20 microns; (3) patterning a second layer disposed on a second surface of the silicon substrate to define a second mask that includes at least one opening; and (4) etching the membrane through the second mask to form at least one evaporation opening in the membrane, wherein the at least one evaporation opening has a first lateral dimension that is less than or equal to 10 microns; wherein the silicon substrate, the first layer, and the second layer collectively define a shadow mask consisting of silicon and silicon nitride. 2. The method of claim 1 further comprising: (5) aligning the membrane and a second substrate; and (6) evaporating an organic material onto the first substrate through the at least one evaporation opening. 3. The method of claim 2 wherein the organic material is a light-emitting material. 4. The method of claim 1 wherein the at least one opening is formed such that it has a second lateral dimension that is less than or equal to 10 microns. 5. The method of claim 1 wherein the first lateral dimension is less than or equal to 5 microns. 6. The method of claim 1 wherein the first lateral dimension is within the range from 2 microns to 10 microns.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • C23C14/042Primary

    using masks · CPC title

  • Electricity · mapped topic

  • H10K71/166Primary

    using selective deposition, e.g. using a mask · CPC title

  • comprising red-green-blue [RGB] subpixels · CPC title

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Frequently asked questions

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What does patent US10644239B2 cover?
The method for producing an OLED micro-display on a silicon wafer uses a collimating shadow mask formed on a silicon substrate. The mask is fabricated by depositing a material layer on the front side and on the back side of the substrate and etching a portion of the layer on the back side of the substrate to a reduced thickness of at least 20 microns. At least one opening is created in the etch…
Who is the assignee on this patent?
Emagin Corp
What technology area does this patent fall under?
Primary CPC classification H01L51/0011. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 05 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).