Clock signal auxiliary circuit, and display device

US10643575B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10643575-B2
Application numberUS-201916404210-A
CountryUS
Kind codeB2
Filing dateMay 6, 2019
Priority dateJul 13, 2018
Publication dateMay 5, 2020
Grant dateMay 5, 2020

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present disclosure relates to display technologies, and particularly to a clock signal auxiliary circuit and a display device. The circuit can include a voltage detection circuit, a thermal sensitive sensing circuit, a control circuit, a switch selection circuit, and a signal amplification circuit. The clock signal auxiliary circuit can generate different detection signals according to different ambient temperatures during operation, and generate different control signals according to different detection signals, so as to turn on different channels according to different control signals, pull the clock signal that is finally output to the output end up to the correct potential, and generate correct scan signals at different ambient temperatures according to the clock signal pulled up to the correct potential.

First claim

Opening claim text (preview).

What is claimed is: 1. A clock signal auxiliary circuit configured to provide a clock signal to a shift register, the clock signal auxiliary circuit comprising: a voltage detection circuit connected to a first node, and configured to detect an operating voltage, pull the clock signal up to a first potential when the operating voltage is lower than a preset voltage, and provide the clock signal after being pulled up to the first node, a first end of the voltage detection circuit receiving the clock signal, a second end of the voltage detection circuit receiving the operating voltage, and a third end of the voltage detection circuit being connected to the first node; a thermal sensitive sensing circuit configured to detect the operating voltage and an ambient temperature in real time, and output a detection signal according to the operating voltage and the ambient temperature, wherein the thermal sensitive sensing circuit comprises: a first resistor, a first end of the first resistor receiving a second power signal; a thermistor, a first end of the thermistor being connected to a second end of the first resistor, and a second end of the thermistor receiving a first power signal; and a NOR gate, a first end of the NOR gate being connected to the second end of the first resistor, and a second end of NOR gate receiving the operating voltage; a control circuit connected to the thermal sensitive sensing circuit and a second node, and configured to provide a control signal to the second node according to the detection signal, wherein the control circuit comprises: a current source, a first end of the current source being connected to a third end of the NOR gate, a second end of the current source being connected to the second node, and the current source being configured to generate a current according to the detection signal and provide the control signal to the second node according to the current; and a second resistor, a first end of the second resistor being connected to the second node and a second end of the second resistor receiving the second power signal; a switch selection circuit connected to the first node, the second node, a third node, and an output end, and configured to connect the first node and the output end or connect the first node and the third node in response to the control signal of the second node, wherein the switch selection circuit comprises: a first switching element, a control end of the first switching element being connected to the second node, a first end of the first switching element being connected to the first node, and a third end of the first switching element being connected to the output end; and a second switching element, a control end of the second switching element being connected to the second node, a first end of the second switching element being connected to the first node, and a second end of the second switching element being connected to the third node, wherein the first switching element and the second switching element have opposite conduction levels; and a signal amplification circuit connected to the third node and the output end, and configured to amplify a signal of the third node and output the signal as amplified to the output end, wherein the signal amplification circuit comprises: a third resistor, a first end of the third resistor being connected to the third node; an operational amplifier, a first end of the operational amplifier being connected to a second end of the third resistor, a second end of the operational amplifier being connected to a fourth node, a third end of the operational amplifier being connected to the output end, a fourth end of the operational amplifier receiving the first power signal, and a fifth end of the operational amplifier receiving the second power signal; a fourth resistor, a first end of the fourth resistor being connected to the output end and a second end of the fourth resistor being connected to the fourth node; and a fifth resistor, a first end of the fifth resistor being connected to the fourth node and a second end of the fifth resistor receiving the second power signal. 2. The clock signal auxiliary circuit according to claim 1 , wherein the thermal sensitive sensing circuit is configured to: output a first detection signal when the operating voltage is lower than the preset voltage and the ambient temperature is lower than a preset temperature; and output a second detection signal when the operating voltage is lower than the preset voltage and the ambient temperature is higher than the preset temperature. 3. The clock signal auxiliary circuit according to claim 2 , wherein the control circuit is configured to: provide a first control signal to the second node according to the first detection signal; and provide a second control signal to the second node according to the second detection signal. 4. The clock signal auxiliary circuit according to claim 3 , wherein the switch selection circuit is specifically configured to: connect the first node and the third node in response to the first control signal; and connect the first node and the output end in response to the second control signal. 5. The clock signal auxiliary circuit according to claim 1 , wherein the thermal sensitive sensing circuit further comprises: a first storage capacitor, wherein a first end of the first storage capacitor receives the first power signal, and a second end of the first storage capacitor receives the second power signal. 6. The clock signal auxiliary circuit according to claim 5 , wherein the control circuit further comprises: a sixth resistor, wherein a first end of the sixth resistor is connected to the second end of the current source, and a second end of the sixth resistor is connected to the second node. 7. The clock signal auxiliary circuit according to claim 6 , wherein the signal amplification circuit further comprises: a second storage capacitor, wherein a first end of the second storage capacitor receives the first power signal, and a second end of the second storage capacitor receives the second power signal. 8. The clock signal auxiliary circuit according to claim 1 , wherein the first switching element is a P-type transistor, and the second switching element is an N-type transistor; or the first switching element is an N-type transistor, and the second switching element is a P-type transistor. 9. A display device comprising a clock signal auxiliary circuit, wherein the clock signal auxiliary circuit comprises: a voltage detection circuit connected to a first node, and configured to detect an operating voltage, pull a clock signal up to a first potential when the operating voltage is lower than a preset voltage, and provide the clock signal after being pulled up to the first node a first end of the voltage detection circuit receiving the clock signal, a second end of the voltage detection circuit receiving the operating voltage, and a third end of the voltage detection circuit being connected to the first node; a thermal sensitive sensing circuit configured to detect the operating voltage and an ambient temperature in real time, and output a detection signal according to the operating voltage and the ambient temperature, wherein the thermal sensitive sensing circuit comprises: a first resistor, a first end of the first resistor receiving a second power signal; a thermistor, a first end of the thermistor being connected to a second end of the first resistor, and a second end of the thermistor receiving a first power signal; and a NOR gate, a first end of the NOR gate being connected to the second end of the first resistor, and a second end of NOR gate receiving the operating voltage; a control circuit connected to the th

Assignees

Inventors

Classifications

  • G09G5/006Primary

    Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04) · CPC title

  • Details of output amplifiers or buffers arranged for use in a driving circuit · CPC title

  • Details of a shift registers arranged for use in a driving circuit · CPC title

  • Temperature compensation · CPC title

  • Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10643575B2 cover?
The present disclosure relates to display technologies, and particularly to a clock signal auxiliary circuit and a display device. The circuit can include a voltage detection circuit, a thermal sensitive sensing circuit, a control circuit, a switch selection circuit, and a signal amplification circuit. The clock signal auxiliary circuit can generate different detection signals according to diff…
Who is the assignee on this patent?
Fuzhou Boe Optoelectronics Tech Co Ltd, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G5/006. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 05 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).