Method and apparatus for determining a clock frequency for an electronic processor

US10637397B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10637397-B2
Application numberUS-201715672251-A
CountryUS
Kind codeB2
Filing dateAug 8, 2017
Priority dateAug 8, 2017
Publication dateApr 28, 2020
Grant dateApr 28, 2020

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Method and apparatus for determining a clock frequency for an electronic processor are provided. One embodiment provides a clock generator for determining a clock frequency for an electronic processor and providing a clock signal to the electronic processor. The clock generator includes a crystal oscillator producing a reference signal and a phase locked loop receiving the reference signal and configured to generate the clock signal based on the reference signal. The clock generator also includes a tuning logic controller electrically coupled to the phase locked loop. The tuning logic controller is configured to program the phase locked loop to a first frequency and determine an integrated circuit process corner of the electronic processor. The tuning logic controller is also configured to determine a second frequency based on the integrated circuit process corner and program the phase locked loop to the second frequency.

First claim

Opening claim text (preview).

We claim: 1. A method for determining a clock frequency for an electronic processor receiving a clock signal from a clock generator, the method comprising: programming, using a tuning logic controller, a phase locked loop of the clock generator to a first frequency, the phase locked loop having a tuning voltage associated with the first frequency; determining a voltage range of the tuning voltage for the first frequency; determining an integrated circuit process corner of the electronic processor based on the voltage range; determining a second frequency based on the integrated circuit process corner; and programming, using the tuning logic controller, the phase locked loop to the second frequency. 2. The method of claim 1 , further comprising: determining, using a temperature sensor, an ambient temperature, wherein determining the integrated circuit process corner is based on the ambient temperature. 3. The method of claim 1 wherein determining the voltage range of the tuning voltage further comprises: setting a low voltage threshold to a first value from a list of voltages; setting a high voltage threshold to a second value from the list of voltages; adjusting the low voltage threshold higher to a first voltage based on the tuning voltage; adjusting the high voltage threshold lower to a second voltage based on the tuning voltage, the first voltage and the second voltage defining the voltage range of the tuning voltage for the first frequency. 4. The method of claim 3 , wherein the phase locked loop includes a phase detector receiving a reference signal, a charge pump coupled to the phase detector and configured to output the tuning voltage, and a voltage controlled oscillator receiving the tuning voltage and configured to generate the clock signal based on the tuning voltage, the method further comprising: setting a second low voltage threshold to the first value from the list of voltages; setting a second high voltage threshold to the second value from the list of voltages; adjusting the second low voltage threshold higher to a third voltage based on the tuning voltage; adjusting the second high voltage threshold lower to a fourth voltage based on the tuning voltage, the third voltage and the fourth voltage defining a voltage range of the tuning voltage for the second frequency; determining a gain of the voltage controlled oscillator based on the first frequency, the second frequency, an average of the voltage range of the tuning voltage for the first frequency, and an average of the voltage range of the second frequency; and programming a charge pump current corresponding to the gain of the voltage controlled oscillator to achieve desired phase locked loop bandwidth. 5. A clock generator for determining a clock frequency for an electronic processor and providing a clock signal to the electronic processor, the clock generator comprising: a crystal oscillator producing a reference signal; a phase locked loop receiving the reference signal and configured to generate the clock signal based on the reference signal; and a tuning logic controller electrically coupled to the phase locked loop, the tuning logic controller configured to: program the phase locked loop to a first frequency, the phase locked loop having a tuning voltage associated with the first frequency, determine a voltage range of the tuning voltage for the first frequency, determine an integrated circuit process corner of the electronic processor connected to the clock generator based on the voltage range, determine a second frequency based on the integrated circuit process corner; and program the phase locked loop to the second frequency. 6. The clock generator of claim 5 , further comprising: a temperature sensor detecting a an ambient temperature, wherein the tuning logic controller is further configured to determine the integrated circuit process corner based on the ambient temperature. 7. The clock generator of claim 5 , wherein the phase locked loop includes: a phase detector receiving the reference signal; a charge pump coupled to the phase detector and configured to output the tuning voltage; and a voltage controlled oscillator receiving the tuning voltage and configured to generate the clock signal based on the tuning voltage. 8. The clock generator of claim 7 , further comprising: a low comparator electrically coupled to the tuning logic controller and receiving the tuning voltage, the low comparator having a low voltage threshold; and a high comparator electrically coupled to the tuning logic controller and receiving the tuning voltage, the high comparator having a high voltage threshold; wherein the tuning logic controller for determining the voltage range of the tuning voltage is further configured to: set the low voltage threshold to a first value from a list of voltages; set the high voltage threshold to a second value from the list of voltages; adjust the low voltage threshold higher to a first voltage based on the tuning voltage; adjust the high voltage threshold lower to a second voltage based on the tuning voltage, the first voltage and the second voltage defining the voltage range of the tuning voltage for the first frequency. 9. The clock generator of claim 8 , wherein after programming the phase locked loop to the second frequency, the tuning logic controller is further configured to: set the low voltage threshold to the first value from the list of voltages; set the high voltage threshold to the second value from the list of voltages; adjust the low voltage threshold higher to a third voltage based on the tuning voltage; adjust the high voltage threshold lower to a fourth voltage based on the tuning voltage, the third voltage and the fourth voltage defining a voltage range of the tuning voltage for the second frequency; determine a gain of the voltage controlled oscillator based on the first frequency, the second frequency, an average of the voltage range of the tuning voltage for the first frequency, and an average of the voltage range of the tuning voltage for the second frequency; and program a charge pump current of the charge pump corresponding to the gain of the voltage controlled oscillator to achieve desired phase locked loop bandwidth. 10. A portable communications device, comprising: an electronic processor; a clock generator providing a clock signal to the electronic processor, the clock generator including: a crystal oscillator producing a reference signal; a phase locked loop receiving the reference signal and configured to generate the clock signal based on the reference signal; and a tuning logic controller electrically coupled to the phase locked loop, the tuning logic controller configured to: program the phase locked loop to a first frequency, the phase locked loop having a tuning voltage associated with the first frequency, determine a voltage range of the tuning voltage for the first frequency, determine an integrated circuit process corner of the electronic processor based on the voltage range, determine a second frequency based on the integrated circuit process corner; and program the phase locked loop to the second frequency. 11. The portable communications device of claim 10 , further comprising: a temperature sensor detecting a an ambient temperature, wherein the tuning logic controller is further configured to determine the integrated circuit process corner based on the ambient temperature. 12. The portable communications device of claim 10 , wherein the phase locked loop includes: a phase detector receiving the reference signal; a charge pump coupled to the phase detector and c

Assignees

Inventors

Classifications

  • using a reference signal directly applied to the generator · CPC title

  • H03L7/0995Primary

    the oscillator comprising a ring oscillator · CPC title

  • against variations of temperature only · CPC title

  • specially adapted for high-frequency, e.g. structures providing an impedance match or phase match (non-coaxed protective earth or shield arrangements H01R13/648; coaxed connectors specially adapted for high frequency H01R24/40) · CPC title

  • H03B5/36Primary

    active element in amplifier being semiconductor device ({H03B5/323, H03B5/326} , H03B5/38 take precedence) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10637397B2 cover?
Method and apparatus for determining a clock frequency for an electronic processor are provided. One embodiment provides a clock generator for determining a clock frequency for an electronic processor and providing a clock signal to the electronic processor. The clock generator includes a crystal oscillator producing a reference signal and a phase locked loop receiving the reference signal and …
Who is the assignee on this patent?
Motorola Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H03L7/0995. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 28 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).