Two stage control of converter system with floating cells

Patent metadata

Field	Value
Publication number	US-10637366-B2
Application number	US-201916272234-A
Country	US
Kind code	B2
Filing date	Feb 11, 2019
Priority date	Aug 11, 2016
Publication date	Apr 28, 2020
Grant date	Apr 28, 2020

Abstract

A method for controlling a converter system includes: determining, with a first controller stage, an output voltage reference for the converter system; generating, with the first controller stage, switching commands for a main converter based on the output voltage reference, such that the main converter converts an input voltage into an intermediate voltage provided at an output of the main converter and following the output voltage reference; and generating, with a second controller stage, switching commands for a floating converter cell connected to the output of the main converter, such that the floating converter cell converts the intermediate voltage into an output voltage provided at an output of the floating converter cell, wherein the floating converter cell comprises a cell capacitor and a semiconductor switch arrangement for connecting and disconnecting the cell capacitor between the output of the main converter and the output of the floating converter cell.

First claim

The invention claimed is:

1. A method for controlling a converter system, the method comprising:
determining, with a first controller stage, an output voltage reference for the converter system;
generating, with the first controller stage, switching commands for a main converter based on the output voltage reference, such that the main converter converts an input voltage into an intermediate voltage provided at an output of the main converter and following the output voltage reference;
generating, with a second controller stage, switching commands for a floating converter cell connected to the output of the main converter, such that the floating converter cell converts the intermediate voltage into an output voltage provided at an output of the floating converter cell, wherein the floating converter cell comprises a cell capacitor and a semiconductor switch arrangement for connecting and disconnecting the cell capacitor between the output of the main converter and the output of the floating converter cell;
wherein the switching commands for the floating converter cell are selected by:
determining an output voltage error indicative of a deviation of the output voltage from the output voltage reference;
determining a cell capacitor voltage of the floating converter cell;
quantizing the output voltage error and cell capacitor voltage;
selecting switching commands for the floating converter cell from a lookup table indexed by the quantized output voltage error and the quantized capacitor voltage, such that the output voltage error is reduced and such that the cell capacitor voltage stays within predefined bounds.

2. The method of claim 1 , further comprising:
quantizing a main converter phase current measured in the output of the main converter and selecting the switching commands for the floating converter cell from the lookup table additionally indexed by the quantized main converter phase current;
wherein the lookup table is additionally indexed by a phase of the output voltage.

3. The method of claim 1 ,
wherein a common-mode voltage in the output voltage is quantized and the lookup table is additionally indexed by the quantized common-mode voltage.

4. The method of claim 1 , wherein at least one of a phase voltage and a phase current are transformed into at least one of a quantize transformed phase voltage and a transformed phase current by a direct-quadrature-zero axis transformation in one of a stationary and a rotating reference frame; and wherein the lookup table is indexed by at least one of the quantized transformed phase voltage and the quantized transformed phase current.

5. The method of claim 1 ,
wherein the output voltage error is based on a difference of an actual intermediate voltage measured at the output of the main converter and the output voltage reference; or
wherein the output voltage error is based on a time integral over the difference between the output voltage reference and the actual intermediate voltage; or
wherein the output voltage error is based on a difference of an actual phase-to-phase voltage between outputs of the main converter and a phase-to-phase output voltage reference; or
wherein the output voltage error is based on a time integral over the difference of an actual phase-to-phase voltage between outputs of the main converter and a phase-to-phase output voltage reference.

6. The method of claim 1 ,
wherein the main converter comprises more than one output providing an intermediate voltage with more than one phase;
wherein at least one floating converter cell is connected to each output of the main converter, such that each floating converter cell converts a phase of the intermediate voltage into a phase of the output voltage provided at an output of the respective floating converter cell.

7. The method of claim 2 , wherein a common-mode voltage in the output voltage is quantized and the lookup table is additionally indexed by the quantized common-mode voltage.

8. The method of claim 2 , wherein at least one of a phase voltage and a phase current are transformed into at least one of a quantize transformed phase voltage and a quantize transformed phase current by a direct-quadrature-zero axis transformation in a stationary or in a rotating reference frame; or wherein the lookup table is indexed by at least one of the quantized transformed phase voltage and the quantized transformed phase current.

9. The method of claim 3 , wherein at least one of a phase voltage and a phase current are transformed into at least one of a quantize transformed phase voltage and a quantize transformed phase current by a direct-quadrature-zero axis transformation in a stationary or in a rotating reference frame; or wherein the lookup table is indexed by at least one of the quantized transformed phase voltage and the quantized transformed phase current.

10. A method for controlling a converter system, the method comprising: determining, with a first controller stage, an output voltage reference for the converter system; generating, with the first controller stage, switching commands for a main converter based on the output voltage reference, such that the main converter converts an input voltage into an intermediate voltage provided at an output of the main converter and following the output voltage reference; generating, with a second controller stage, switching commands for a floating converter cell connected to the output of the main converter, such that the floating converter cell converts the intermediate voltage into an output voltage provided at an output of the floating converter cell, wherein the floating converter cell comprises a cell capacitor and a semiconductor switch arrangement for connecting and disconnecting the cell capacitor between the output of the main converter and the output of the floating converter cell; wherein the switching commands for the floating converter cell are selected by: determining an output voltage error indicative of a deviation of the output voltage from the output voltage reference; determining a cell capacitor voltage of the floating converter cell; selecting switching commands for the floating converter cell by minimizing a cost function, which is a function of the output voltage error and the cell capacitor voltage, such that the output voltage error is reduced and such that the cell capacitor voltage stays within predefined bounds.

11. The method of claim 10 , wherein the cost function comprises at least one of: a term with a sum of the output voltage error and a predicted cell voltage of the floating converter cell after an application of a possible next switching command to the floating converter cell; and a term penalizing a difference between an actual applied switching command and a possible next switching command.

12. The method of claim 10 ,
wherein the cost function is minimized subject to a set of admissible switching commands.

13. The method of claim 12 ,
wherein the admissible switching commands are determined from a lookup table providing a set of admissible switching commands for each applied switching command.

14. The method of claim 10 , wherein at least one of:
for selecting a next switching command of a floating converter cell, a cost function is minimized separately for every floating converter cell, which cost function is based on the voltage error of a phase of the floating converter cell and the cell capacitor voltage of the floating converter cell;
the next switching commands of all floating converter cells are selected by minimizing a common cost function being a function of the output voltage error of all phases and the cell capacitor vo

Assignees

• Abb Schweiz Ag

Inventors

• Van Der Merwe Wim
• Geyer Tobias
• Schweizer Mario
• Tsoumas Ioannis

Classifications

• H02M7/487

  Neutral point clamped inverters · CPC title

• H02M7/49 Primary

  Combination of the output voltage waveforms of a plurality of converters · CPC title

• H02M5/4585 Primary

  having a rectifier with controlled elements · CPC title