Circuit board bypass assemblies and components therefor

US10637200B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10637200-B2
Application numberUS-201816110727-A
CountryUS
Kind codeB2
Filing dateAug 23, 2018
Priority dateJan 11, 2015
Publication dateApr 28, 2020
Grant dateApr 28, 2020

How to read this patent

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A connector for use in a free-standing connector port for mating with an external pluggable module is disclosed. The connector has terminals that extend lengthwise of the connector so that cables may be terminated to the terminals and the terminals and cable generally are horizontally aligned together. The connector includes a housing and a pair of connecting elements that flank a card-receiving slot of the connector. The cables exit from the rear of the connector elements and from the connector port. The connector elements engage the connector port to fix the connector in place within the connector port.

First claim

Opening claim text (preview).

We claim: 1. A bipass assembly, comprising: a device with a first panel and a second panel; a chip package, the chip package including a chip supported on a substrate, the chip package including leads extending from the chip to respective first contacts and leads from the chip to second contacts, the first and second contacts positioned at termination areas of the substrate; a first cable and a second cable, the first cable including a first pair of signal conductors and the second cable including a second pair of signal conductors, the first and second pairs of signal conductors each having a first end and a second end associated therewith, wherein the first cable is terminated to the first contacts and the second cable is terminated to the second contacts; an entry connector positioned in the first panel, the entry connector electrically connected to the chip package via the first cable; and an exit connector positioned in the second panel, the exit connector electrically connected to the chip package via the second cable, wherein the second cable is terminated to the second contacts and wherein the entry and exit connectors are configured to mate with respective opposing connectors so as to define, in operation, a 10 Gbps capable signaling transmission lines extending from the chip to the entry and exit connectors. 2. The bypass assembly of claim 1 , wherein the entry connector is an I/O connector and the exit connector is a backplane connector. 3. The bypass assembly of claim 1 , wherein the first and second panels are on opposite sides of the device. 4. The bypass assembly of claim 1 , wherein the first pair signal conductors and the second pair of signal conductors are spaced apart and both the first and second pairs of signal conductors have substantially the same spacing. 5. The bypass assembly of claim 1 , wherein the entry connector includes: a conductive, four-sided connector housing having opposing first and second ends, the housing including a plurality of walls contacting each other and defining a connector passage that is hollow and extends completely therethrough between the first and second ends; a receptacle connector disposed in the connector, the receptacle connector including a body portion supporting a plurality of conductive signal and ground terminals in distinct rows, the body portion defining a card-receiving slot. 6. The bypass assembly of claim 5 , wherein the connector passage includes an interior taper that provides an interference contact with two opposing sides of the receptacle connector to thereby provide an EMI seal between the sides of the receptacle connector and the conductive housing, the receptacle connector further being restrained from linear movement within the passage and further including two EMI seal members extending widthwise along top and bottom sides of the receptacle connector and within the connector passage, the EMI seal members including EMI absorbing material that engages inner surfaces of the connector passage in an interference fit. 7. The bypass assembly of claim 6 , wherein the connector passage includes shoulders that exert a compressive interference engagement force on the receptacle connector body in two different directions. 8. The bypass assembly of claim 6 , wherein one of the connector housing four sides includes a bottom wall with at least one pair of engagement flaps, one of the at least one pair of engagement flaps engaging an outer surface of a sidewall of the connector housing, and the other of the pair engaging an inner surface of the connector housing sidewall. 9. The bypass assembly of claim 6 , wherein the receptacle connector includes two connector elements that each support a terminal array, the two terminal arrays being spaced apart from each other vertically and arranged in the card-receiving slot, the connector including a structure that promotes the signal integrity of data signals passing therethrough by way of an impedance transition from bypass cable wires to the circuits of a circuit card of an opposing mating connector. 10. The bypass assembly of claim 9 , wherein the impedance transition is from about 85 to about 100 ohms within a preselected tolerance level and is accomplished in three adjacent zones, wherein a first of the three zones has a hot melt adhesive surrounding portions of the terminals and wherein a second of the three zones has a liquid crystal polymer surrounding portions of the terminals, and wherein a third of the three zones has air surrounding portions of the terminals. 11. The bypass assembly of claim 6 , wherein the receptacle connector includes a pair of connector elements, each connector element including a plurality of terminals arranged in a row and axially aligned with the cable signal conductors and grounds, two of the connector elements being stacked together to define two spaced-apart rows of terminals that extend into the card-receiving slot flanked by the two rows of terminals. 12. The bypass assembly of claim 11 , wherein exterior portions of the connector elements are conductive and engage the connector housing. 13. The bypass assembly of claim 1 , further including a visual indicator bar supported thereon proximate a front end of the entry connector, the visual indicator bar including a plurality of LEDs for indicating operational conditions of a connector port defined by the connector housing, the connector housing having no light transmitting materials extending between its front end and a circuit board to which the connector housing is mounted. 14. The bypass assembly of claim 1 , further including a heat sink associated with the connector housing, the connector housing having an opening disposed in one surface thereof and which receives the base of an elongated heat sink, the base extending downwardly into the hollow passage for contacting a surface of an opposing mating connector inserted therein, and the heat sink base includes a contact member that extends into the connector housing hollow passage. 15. The bypass assembly of claim 14 , wherein the heat sink includes a cantilevered, heat transfer portion that extends rearwardly of the connector housing, the heat transfer portion including a plurality of spaced apart fins extending downwardly rearwardly of the connector housing and further include a lengthwise channel with a heat pipe extending between the heat sink contact portion and the heat transfer portion. 16. The bypass assembly of claim 1 , wherein the entry connector includes additional cables connected to additional terminals, wherein the additional cables are configured to support low power and logic control wires and are capable of being routed separately from the 10 Gbps capable signaling transmission lines. 17. A chip package bypass assembly, comprising: a chip package, the chip package including an integrated circuit supported on a substrate, the substrate including a plurality of contacts disposed on opposing first and second surfaces of the substrate, the chip package further including high speed leads extending from high speed data transmission circuits of the integrated circuit to associated first and second contacts disposed at termination areas of the substrate; at least one cable containing a first wire pair and an outer conductive covering the first wire pair, the first wire pair including a pair of differential signal conductors extending lengthwise between first and second free ends of the cable; an external connector interface including a conductive housing body having a plurality of walls that cooperatively define a hollow interior spac

Assignees

Inventors

Classifications

  • H01R31/005Primary

    Intermediate parts for distributing signals · CPC title

  • Light emitting diodes (LEDs) · CPC title

  • with built-in electronic circuit (H01R13/70, H01R13/719 take precedence) · CPC title

  • H05K7/1487Primary

    Blade assemblies, e.g. blade cases or inner arrangements within a blade · CPC title

  • having electrical distribution arrangements, e.g. power supply or data communications · CPC title

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What does patent US10637200B2 cover?
A connector for use in a free-standing connector port for mating with an external pluggable module is disclosed. The connector has terminals that extend lengthwise of the connector so that cables may be terminated to the terminals and the terminals and cable generally are horizontally aligned together. The connector includes a housing and a pair of connecting elements that flank a card-receivin…
Who is the assignee on this patent?
Molex Llc
What technology area does this patent fall under?
Primary CPC classification H01R31/005. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 28 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).