Adaptive voltage modulation circuits for adjusting supply voltage to reduce supply voltage droops and minimize power consumption

Patent metadata

Field	Value
Publication number	US-10635159-B2
Application number	US-201715604038-A
Country	US
Kind code	B2
Filing date	May 24, 2017
Priority date	May 27, 2016
Publication date	Apr 28, 2020
Grant date	Apr 28, 2020

Abstract

Adaptive voltage modulation circuits for adjusting supply voltage to reduce supply voltage droops and minimize power consumption are provided. In one aspect, an adaptive voltage modulation circuit detects a supply voltage droop by detecting when a supply voltage falls below a droop threshold voltage, and adjusts a clock signal provided to a load circuit in response to a supply voltage droop. The adaptive voltage modulation circuit keeps a count of the number of clock signal cycles during which the supply voltage is below the droop threshold voltage. The adaptive voltage modulation circuit increases the supply voltage in response to the count exceeding an upper threshold value, and decreases the supply voltage in response to the count being less than a lower threshold value at an end of a defined period. The adaptive voltage modulation circuit can reduce the time a load circuit operates with reduced frequency while minimizing power consumption.

First claim

What is claimed is:

1. An adaptive voltage modulation circuit, comprising:
a supply voltage droop detection and mitigation circuit comprising:
a detection circuit configured to generate a droop detection signal in an active state in response to a supply voltage provided to a load circuit being less than a droop threshold voltage; and
a clock adjustment circuit configured to adjust a load clock signal provided to the load circuit in response to the droop detection signal;

a supply voltage adjust circuit comprising:
a counter circuit configured to increment a count in response to each cycle of a reference clock signal in which the droop detection signal is in an active state;
a voltage adjust-up circuit configured to generate a voltage adjust-up signal in an active state in response to the count being greater than an adjust-up threshold value; and
a voltage adjust-down circuit configured to generate a voltage adjust-down signal in an active state in response to the count being less than an adjust-down threshold value at an end of a defined period as measured by the reference clock signal; and

a supply voltage controller circuit configured to:
increase the supply voltage provided to the load circuit in response to the voltage adjust-up signal being in an active state; and
decrease the supply voltage provided to the load circuit in response to the voltage adjust-down signal being in an active state.

2. The adaptive voltage modulation circuit of claim 1 , wherein:
the voltage adjust-up circuit is further configured to generate the voltage adjust-up signal in an inactive state in response to the count being less than the adjust-up threshold value at the end of the defined period; and
the voltage adjust-down circuit is further configured to generate the voltage adjust-down signal in an inactive state in response to the count being greater than the adjust-down threshold value at the end of the defined period.

3. The adaptive voltage modulation circuit of claim 1 , wherein:
the voltage adjust-up circuit is further configured to generate the voltage adjust-up signal in an inactive state in response to an acknowledgement signal of the supply voltage controller circuit indicating that the supply voltage has been adjusted up; and
the voltage adjust-down circuit is further configured to generate the voltage adjust-down signal in an inactive state in response to an acknowledgement signal of the supply voltage controller circuit indicating that the supply voltage has been adjusted down.

4. The adaptive voltage modulation circuit of claim 3 , wherein the counter circuit is configured to reset the count to an initial count value in response to the acknowledgement signal of the supply voltage controller circuit indicating that the supply voltage has been adjusted up.

5. The adaptive voltage modulation circuit of claim 3 , wherein the counter circuit is configured to reset the count to an initial count value in response to the acknowledgement signal of the supply voltage controller circuit indicating that the supply voltage has been adjusted down.

6. The adaptive voltage modulation circuit of claim 1 , wherein the counter circuit is configured to reset the count to an initial count value in response to the end of the defined period.

7. The adaptive voltage modulation circuit of claim 1 , wherein the counter circuit is further configured to:
increment an adjust-up count in response to each cycle of the reference clock signal during an adjust-up period in which the droop detection signal is in an active state; and
increment an adjust-down count in response to each cycle of the reference clock signal during an adjust-down period in which the droop detection signal is in an active state.

8. The adaptive voltage modulation circuit of claim 7 , wherein the counter circuit comprises:
a first input node;
a second input node;
a first output node; and
a second output node;
the counter circuit configured to:
receive the droop detection signal on the first input node of the counter circuit;
receive the reference clock signal on the second input node of the counter circuit;
provide an up count signal indicating the adjust-up count on the first output node of the counter circuit; and
provide a down count signal indicating the adjust-down count on the second output node of the counter circuit.

9. The adaptive voltage modulation circuit of claim 8 , wherein the supply voltage adjust circuit further comprises:
an adjust-up register comprising an output node and configured to:
store the adjust-up threshold value; and
provide the adjust-up threshold value on the output node of the adjust-up register; and

an adjust-down register comprising an output node and configured to:
store the adjust-down threshold value; and
provide the adjust-down threshold value on the output node of the adjust-down register.

10. The adaptive voltage modulation circuit of claim 9 , wherein:
the voltage adjust-up circuit comprises:
a first input node electrically coupled to the first output node of the counter circuit;
a second input node electrically coupled to the output node of the adjust-up register; and
an output node electrically coupled to a first input node of the supply voltage controller circuit;
the voltage adjust-up circuit configured to provide the voltage adjust-up signal on the output node of the voltage adjust-up circuit; and

the voltage adjust-down circuit comprises:
a first input node electrically coupled to the second output node of the counter circuit;
a second input node electrically coupled to the output node of the adjust-down register; and
an output node electrically coupled to a second input node of the supply voltage controller circuit;
the voltage adjust-down circuit configured to provide the voltage adjust-down signal on the output node of the voltage adjust-down circuit.

11. The adaptive voltage modulation circuit of claim 1 , wherein the supply voltage droop detection and mitigation circuit further comprises a droop threshold register comprising an output node and configured to:
store a digital threshold signal that is a digital representation of the droop threshold voltage; and
provide the digital threshold signal on the output node of the droop threshold register.

12. The adaptive voltage modulation circuit of claim 11 , wherein the supply voltage droop detection and mitigation circuit further comprises:
a digital-to-analog converter (DAC) comprising:
an input node electrically coupled to the output node of the droop threshold register; and
an output node;
the DAC configured to provide the droop threshold voltage on the output node of the DAC; and

wherein the detection circuit comprises a comparator circuit comprising:
a first input node electrically coupled to the output node of the DAC;
a second input node electrically coupled to the supply voltage; and
an output node;
the comparator circuit configured to provide the droop detection signal on the output node of the comparator circuit, wherein:
the droop detection signal transitions to an active state in response to the droop threshold voltage being greater than the supply voltage; and
the droop detection signal transitions to an inactive state in response to the droop threshold voltage being less than the supply voltage.

13. The adaptive voltage modulation circuit of claim 12 , wherein the clock adjustment circuit comprises:
a first input node that receives a root clock signal;
a second input node electrically coupled to the output node of the comparator circuit; and
an output node;
the clock adjustment circuit configured to provide the

Assignees

• Qualcomm Inc

Inventors

• Kolla Yeshwant Nagaraj
• Bridges Jeffrey Todd
• Patel Sanjay
• Sridhar Shraddha
• Price Burt Lee
• Tarr Gabriel Martel

Classifications

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title

• G06F1/324

  by lowering clock frequency · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• G06F1/3296 Primary

  by lowering the supply or operating voltage · CPC title

• H02M3/157 Primary

  with digital control · CPC title