Semiconductor device including switching device having four-terminal structure

Patent metadata

Field	Value
Publication number	US-10629716-B2
Application number	US-201716092492-A
Country	US
Kind code	B2
Filing date	Apr 6, 2017
Priority date	May 24, 2016
Publication date	Apr 21, 2020
Grant date	Apr 21, 2020

Abstract

A semiconductor device has a lateral switching device that includes a channel forming layer, a gate structure portion, a source electrode, a drain electrode, a third semiconductor layer, a fourth semiconductor layer, and a junction gate electrode. The gate structure portion has a gate insulating film provided in a recess portion of the channel forming layer and a MOS gate electrode functioning as a gate electrode of a MOS structure provided on the gate insulating film. The source electrode and the junction gate electrode are coupled through an electrode layer provided on an interlayer insulating film covering the MOS gate electrode. An end of the third semiconductor layer facing the drain electrode protrudes toward the drain electrode from an end of the fourth semiconductor layer facing the drain electrode by a distance in a range of 1 μm to 5 μm both inclusive.

First claim

The invention claimed is:

1. A semiconductor device, comprising:
a lateral switching device, wherein the lateral switching device includes:
a channel forming layer provided on a substrate made of a conductive material and having a heterojunction structure formed of a first semiconductor layer made of a first GaN-based semiconductor forming a drift region and a second semiconductor layer made of a second GaN-based semiconductor having higher bandgap energy than the first GaN-based semiconductor and provided with a recess portion;
a gate structure portion having a gate insulating film provided in the recess portion and a MOS gate electrode functioning as a gate electrode of a MOS structure provided on the gate insulating film;
a source electrode and a drain electrode disposed on both sides of the second semiconductor layer with the gate structure portion in between;
a third semiconductor layer made of a third GaN-based semiconductor undoped with an impurity and disposed on the second semiconductor layer at a location away from the drain electrode between the gate structure portion and the drain electrode;
a fourth semiconductor layer made of a p-type fourth GaN-based semiconductor and provided on the third semiconductor layer; and
a junction gate electrode being in contact with the fourth semiconductor layer,

the source electrode and the junction gate electrode are coupled through an electrode layer provided on an interlayer insulating film covering the MOS gate electrode, and
an end of the third semiconductor layer facing the drain electrode protrudes toward the drain electrode from an end of the fourth semiconductor layer facing the drain electrode by a distance in a range of 1 μm to 5 μm both inclusive.

2. The semiconductor device according to claim 1 , wherein
an area where the switching device is formed is used as an active region,
the electrode layer is provided at least in the active region, and
the source electrode and the junction gate electrode are coupled through the electrode layer in the active region.

3. The semiconductor device according to claim 2 , wherein
the MOS gate electrode is provided to extend in one direction which is a longitudinal direction,
the electrode layer is divided into a plurality of sections along an extending direction of the MOS gate electrode and disposed in a ladder shape in the active region, and
the MOS gate electrode is connected to a gate pad between the plurality of sections of the electrode film disposed in the ladder shape.

4. The semiconductor device according to claim 1 , wherein
the third semiconductor layer is in contact with the gate structure portion, and
the third semiconductor layer is disposed closer to the drain electrode than the gate structure portion and also disposed closer to the source electrode than the gate structure portion.

5. The semiconductor device according to claim 1 , wherein
a resistance value of resistance components in a current path where a current flows through the junction gate electrode and the source electrode at turn-off of the switching device is given as a junction gate-source resistance value, and
the junction gate-source resistance value is set to 200 Ω mm or less.

6. The semiconductor device according to claim 5 , wherein
the junction gate-source resistance value is a total resistance value of an internal resistance of the third semiconductor layer, an internal resistance of the fourth semiconductor layer, a contact resistance between the fourth semiconductor layer and the junction gate electrode, and an electrode resistance from the junction gate electrode to the source electrode.

7. The semiconductor device according to claim 1 , wherein
a resistance value of resistance components in a current path where a current flows through the junction gate electrode and the source electrode at turn-off of the switching device is given as a junction gate-source resistance, and
the junction gate-source resistance value is set to 100 Ω mm or less.

8. The semiconductor device according to claim 1 , wherein
a contact resistance between the fourth semiconductor layer and the junction gate electrode is set to 100 Ω mm or less.

9. The semiconductor device according to claim 1 , wherein
the end of the fourth semiconductor layer facing the drain electrode protrudes toward the drain electrode from the end of the third semiconductor layer facing the drain electrode by the distance in a range of 1 μm to 4 μm both inclusive.

Assignees

• Denso Corp

Inventors

• Tarumi Hiroyuki
• Oyama Kazuhiro
• Eum Youngshin
• Hoshi Shinichi

Classifications

• H01L29/778 Primary

  Electricity · mapped topic

• H01L29/2003

  Electricity · mapped topic

• H01L29/205

  Electricity · mapped topic

• H01L29/4236

  Electricity · mapped topic

• H01L29/7832

  Electricity · mapped topic