Sub-pixel rendering data conversion apparatus and method

US10621932B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10621932-B1
Application numberUS-201816158325-A
CountryUS
Kind codeB1
Filing dateOct 12, 2018
Priority dateOct 12, 2018
Publication dateApr 14, 2020
Grant dateApr 14, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A sub-pixel rendering data conversion apparatus including an inverse sub-pixel rendering circuit and a sub-pixel rendering circuit is provided. The inverse sub-pixel rendering circuit receives the first sub-pixel rendering data converted from the first true image data and converting the first sub-pixel rendering data to the second true image data, and the first sub-pixel rendering data includes data of the first sub-pixel rendering arrangement. The sub-pixel rendering circuit converts the second true image data to the second sub-pixel rendering data and outputs the second sub-pixel rendering data to a display panel, the second sub-pixel rendering data includes data of the second sub-pixel rendering arrangement, and the display panel includes a plurality of sub-pixels arranged in the manner of the second sub-pixel rendering arrangement.

First claim

Opening claim text (preview).

What is claimed is: 1. A sub-pixel rendering data conversion apparatus, comprising: an inverse sub-pixel rendering circuit, receiving a first sub-pixel rendering data converted from a first true image data and converting the first sub-pixel rendering data to a second true image data, wherein the first sub-pixel rendering data comprises data of a first sub-pixel rendering arrangement; and a sub-pixel rendering circuit, converting the second true image data to a second sub-pixel rendering data and outputting the second sub-pixel rendering data to a display panel, wherein the second sub-pixel rendering data comprises data of a second sub-pixel rendering arrangement, and the display panel comprises a plurality of sub-pixels arranged in the manner of the second sub-pixel rendering arrangement. 2. The sub-pixel rendering data conversion apparatus as recited in claim 1 , wherein the inverse sub-pixel rendering circuit and the sub-pixel rendering circuit are located in a driver chip. 3. The sub-pixel rendering data conversion apparatus as recited in claim 2 , further comprising a data processing circuit located in the driver chip, wherein the second true image data is further processed by the data processing circuit. 4. The sub-pixel rendering data conversion apparatus as recited in claim 1 , wherein the sub-pixel rendering circuit is located in a driver chip, and the inverse sub-pixel rendering circuit is located in a decoder chip. 5. The sub-pixel rendering data conversion apparatus as recited in claim 4 , further comprising a data processing circuit located in the driver chip, wherein the second true image data is further processed by the data processing circuit. 6. The sub-pixel rendering data conversion apparatus as recited in claim 1 , wherein the first sub-pixel rendering arrangement and the second sub-pixel rendering arrangement are different. 7. A sub-pixel rendering data conversion method, comprising: receiving a first sub-pixel rendering data converted from a first true image data, wherein the first sub-pixel rendering data comprises data of a first sub-pixel rendering arrangement; converting the first sub-pixel rendering data to a second true image data by an inverse sub-pixel rendering circuit; converting the second true image data to a second sub-pixel rendering data by a sub-pixel rendering circuit, wherein the second sub-pixel rendering data comprises data of a second sub-pixel rendering arrangement; and outputting the second sub-pixel rendering data to a display panel, wherein the display panel comprises a plurality of sub-pixels arranged in the manner of the second sub-pixel rendering arrangement. 8. The sub-pixel rendering data conversion method as recited in claim 7 , wherein the inverse sub-pixel rendering circuit and the sub-pixel rendering circuit are located in a driver chip. 9. The sub-pixel rendering data conversion method as recited in claim 8 , further comprising: processing the second true image data by a data processing circuit located in the driver chip. 10. The sub-pixel rendering data conversion method as recited in claim 7 , wherein the sub-pixel rendering circuit is located in a driver chip, and the inverse sub-pixel rendering circuit is located in a decoder chip. 11. The sub-pixel rendering data conversion method as recited in claim 10 , further comprising: processing the second true image data by a data processing circuit located in the driver chip. 12. The sub-pixel rendering data conversion method as recited in claim 7 , wherein the first sub-pixel rendering arrangement and the second sub-pixel rendering arrangement are different. 13. A sub-pixel rendering data conversion apparatus, comprising: a sub-pixel rendering circuit, configured to receive a first sub-pixel rendering data converted from a first true image data and convert the first sub-pixel rendering data to a second true image data at a first time, wherein the first sub-pixel rendering data comprises data of a first sub-pixel rendering arrangement, and the sub-pixel rendering circuit is configured to convert the second true image data to a second sub-pixel rendering data and output the second sub-pixel rendering data to a display panel at a second time, wherein the second sub-pixel rendering data comprises data of a second sub-pixel rendering arrangement, and the display panel comprises a plurality of sub-pixels arranged in the manner of the second sub-pixel rendering arrangement. 14. The sub-pixel rendering data conversion apparatus as recited in claim 13 , wherein a controller controls the sub-pixel rendering circuit to perform an inverse function at the first time and a forward function at the second time. 15. The sub-pixel rendering data conversion apparatus as recited in claim 13 , wherein the sub-pixel rendering circuit is located in a driver chip. 16. The sub-pixel rendering data conversion apparatus as recited in claim 13 , wherein the sub-pixel rendering circuit is located in a decoder chip. 17. The sub-pixel rendering data conversion apparatus as recited in claim 15 , further comprising a data processing unit located in the driver chip, wherein the second true image data is further processed by the data processing unit.

Assignees

Inventors

Classifications

  • Improvement of perceived resolution by subpixel rendering · CPC title

  • using circuits for interfacing with colour displays · CPC title

  • Adapting incoming signals to the display format of the display terminal · CPC title

  • G09G3/2074Primary

    using sub-pixels · CPC title

  • Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components · CPC title

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What does patent US10621932B1 cover?
A sub-pixel rendering data conversion apparatus including an inverse sub-pixel rendering circuit and a sub-pixel rendering circuit is provided. The inverse sub-pixel rendering circuit receives the first sub-pixel rendering data converted from the first true image data and converting the first sub-pixel rendering data to the second true image data, and the first sub-pixel rendering data includes…
Who is the assignee on this patent?
Novatek Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification G09G3/2074. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 14 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).