Device and method for driving display panel in response to image data

Patent metadata

Field	Value
Publication number	US-10614747-B2
Application number	US-201715420599-A
Country	US
Kind code	B2
Filing date	Jan 31, 2017
Priority date	Jan 31, 2017
Publication date	Apr 7, 2020
Grant date	Apr 7, 2020

Abstract

A display driver includes: a receiver configured to receive image data of each line of a display panel from an external device; a line latch circuit having a line latch configured to latch the image data of each line received by the receiver in response to a strobe signal; a driving circuit section which drives the display panel in response to the image data latched by the line latch; and a timing controller configured to generate the strobe signal. The receiver is configured to detect occurrence of transmission error in data transmission about each line. The timing controller is configured to generate the strobe signal in response to a detection result of the occurrence of transmission error.

First claim

What is claimed is:

1. A display driver comprising:
a receiver configured to receive image data of each line of a display panel from an external device;
a line latch circuit having a line latch configured to latch the image data of said each line received by the receiver in response to a strobe signal;
a driving circuit section which drives the display panel in response to the image data latched by the line latch; and
a timing controller configured to generate the strobe signal,
wherein the receiver is configured to detect occurrence of transmission error in data transmission about said each line, and
wherein the timing controller is configured to generate the strobe signal in response to a detection result of the occurrence of transmission error.

2. The display driver according to claim 1 , wherein the line latch is configured to latch the image data of said each line according to activation of the strobe signal,
wherein the timing controller is configured to activate the strobe signal in synchronization with start of a horizontal sync period in which pixels of a first line of the display panel are driven when the transmission error is not detected for the first line by the receiver, and
wherein the timing controller is, when the transmission error is detected in a second line of the display panel by the receiver, configured to restrain the activation of the strobe signal in a horizontal sync period in which the pixels of the second line of the display panel are driven.

3. The display driver according to claim 1 , further comprising:
a storage circuit configured to store the image data of a plurality of lines; and
a line memory circuit comprising a first memory area and a second memory area, each of which is configured to be able to store the image data for one line,
wherein the line memory circuit is configured to transmit the image data of said each line received from the receiver to the storage circuit, and
wherein the storage circuit is configured to transmit the image data received from the line memory circuit to the line latch circuit in a reception order.

4. The display driver according to claim 3 , wherein the line memory circuit is configured to write the image data received from the receiver in one of the first and second memory areas according to a pointer received from the timing controller, and to read the image data from the other of the first and second memory areas to transmit to the storage circuit, and wherein the timing controller is configured to generate the pointer in response to the detection result of the occurrence of transmission error.

5. The display driver according to claim 4 , wherein, when the pointer is in a first state, the line memory circuit is configured to write the image data received from the receiver in the first memory area, and to transmit the image data read from the second memory area to the storage circuit,
wherein, when the pointer is in a second state, the line memory circuit is configured to write the image data received from the receiver in the second memory area, and to transmit the image data read from the first memory area to the storage circuit,
wherein the timing controller is, when the transmission error is not detected about a first line of the display panel by the receiver configured to update a state of the pointer between the first state and the second state at a first timing when transmitting the image data used for driving pixels of the first line of the display panel to the storage circuit from the line memory circuit, and
wherein the timing controller is, when the transmission error is detected about a second line of the display panel by the receiver, configured not to update the state of the pointer at a second timing when transmitting the image data used for driving pixels of the second line of the display panel to the storage circuit from the line memory circuit.

6. The display driver according to claim 3 , wherein, when the display driver is set to a first operation mode, an operation of the line memory circuit and the storage circuit is stopped, the image data of said each line received from the external device are transmitted to the line latch circuit from the receiver, and the timing controller generates the strobe signal in response to the detection result of the occurrence of transmission error.

7. The display driver according to claim 6 , wherein, when the display driver is set to a second operation mode which is different from the first operation mode, the image data of said each line received from the external device by the receiver are transmitted to the line memory circuit from the receiver, the line memory circuit writes the image data received from the receiver in one of the first and second memory areas according to a pointer received from the timing controller, and transmits the image data read from the other of the first and second memory areas to the storage circuit, and the timing controller generates the strobe signal in response to the detection result of the occurrence of transmission error.

8. The display driver according to claim 7 , wherein, when the display driver is set to the first operation mode, the display driver carries out touch detection to the display panel in a blanking period of a vertical sync period, and
wherein, when the display driver is set to the second operation mode, the display driver carries out the touch detection to the display panel in a plurality of specific horizontal sync periods provided in an image display period of the vertical sync period.

9. A display driver comprising:
a receiver configured to receive image data of each line of a display panel from an external device;
a line memory circuit comprising a first memory area and a second memory area, each of which is configured to be able to store the image data for one line;
a storage circuit configured to store the image data of a plurality of lines;
a driving circuit section which drives the display panel in response to the image data outputted from the storage circuit; and
a timing controller,
wherein the receiver is configured to detect occurrence of transmission error in data transmission about said each line,
wherein the storage circuit is configured to output the image data received from the line memory circuit in a reception order,
wherein the line memory circuit is configured to write the image data received from the receiver in one of the first and second memory areas according to a pointer received from the timing controller, and to read the image data from the other of the first and second memory areas to transmit to the storage circuit, and
wherein the timing controller is configured to generate the pointer in response to a detection result of the occurrence of transmission error.

10. The display driver according to claim 9 , wherein the line memory circuit is, when the pointer is in a first state, configured to write the image data received from the receiver in the first memory area, and to transmit the image data read from the second memory area to the storage circuit,
wherein the line memory circuit is, when the pointer is in a second state, configured to write the image data received from the receiver in the second memory area, and to transmit the image data read from the first memory area to the storage circuit,
wherein the timing controller is configured to update a state of the pointer between the first state and the second state at a first timing of transmitting, to the storage circuit from the line memory circuit, the image data used for driving pixels of a first line of the display panel when the transmission error is not detected about the first line by the receiver, and
wherein the timing controll

Assignees

• Synaptics Inc

Inventors

• Yamazumi Kenji
• Hatayama Hirokazu
• Shamarao Prashant
• Kitamura Kota

Classifications

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G3/3225

  using an active matrix · CPC title

• G06F3/0412

  Digitisers structurally integrated in a display · CPC title

• G09G5/393

  Arrangements for updating the contents of the bit-mapped memory · CPC title

• G09G3/3648

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title