Compensation circuit for generating read/program/erase voltage

Patent metadata

Field	Value
Publication number	US-10613571-B2
Application number	US-201916256410-A
Country	US
Kind code	B2
Filing date	Jan 24, 2019
Priority date	Jun 8, 2018
Publication date	Apr 7, 2020
Grant date	Apr 7, 2020

Abstract

A compensation circuit may include a reference current generating circuit including a first transistor of a first width configured to transfer a first current. The reference generating circuit may output a reference current based on the first current. The compensation circuit may include a compensation current generating circuit including a second transistor of a second width configured to transfer a second current. The second transistor may be selected from among a first group of transistors based on a code. The transistors of the first group may have widths proportional to the first width. The compensation current generating circuit may output a compensation current having a magnitude selected proportionally to a magnitude of the reference current based on the second current. The compensation circuit may include a current mirror circuit configured to output a compensation voltage having a magnitude based on a magnitude of the second current and the second width.

First claim

What is claimed is:

1. A compensation circuit comprising:
a reference current generating circuit comprising a first transistor of a first width configured to transfer a first current, the reference current generating circuit configured to output a reference current based on the first current;
a compensation current generating circuit comprising a second transistor of a second width configured to transfer a second current, the second transistor selected from among a first group of transistors based on a code, the transistors of the first group having widths proportional to the first width, respectively, the compensation current generating circuit configured to output a compensation current having a magnitude selected to be proportional to a magnitude of the reference current based on the second current;
a current mirror circuit configured to output a compensation voltage having a magnitude that is based on a magnitude of the second current; and
an output transistor configured to output a sensing voltage based on the compensation voltage,
wherein with respect to a first value, a second value, and a third value of the code, when a difference between the first value and the second value is identical to a difference between the second value and the third value, a difference between a first magnitude of the sensing voltage output based on the first value and a second magnitude of the sensing voltage output based on the second value corresponds to a difference between the second magnitude and a third magnitude of the sensing voltage output based on the third value.

2. The compensation circuit of claim 1 , wherein the reference current generating circuit further comprises:
a first current source configured to output the reference current; and
a third transistor having the first width and configured to transfer a third current for outputting the reference current to the first current source.

3. The compensation circuit of claim 2 , wherein the magnitude of the reference current corresponds to a sum of a magnitude of the first current and a magnitude of the third current.

4. The compensation circuit of claim 2 , wherein the compensation current generating circuit further comprises:
a second current source configured to output the compensation current; and
a fourth transistor having the second width and configured to transfer a fourth current for outputting the compensation current to the second current source.

5. The compensation circuit of claim 4 , further comprising a direction selecting circuit configured to:
receive a first gate voltage, a magnitude of which varies with a change of a temperature, and a second gate voltage, a magnitude of which is uniform regardless of a change in the temperature;
output the first gate voltage to a gate terminal of the second transistor and the second gate voltage to a gate terminal of the fourth transistor in response to a first logical value of a selection signal; and
output the first gate voltage to the gate terminal of the fourth transistor and the second gate voltage to the gate terminal of the second transistor in response to a second logical value of the selection signal.

6. The compensation circuit of claim 4 , wherein the second current source comprises a fifth transistor configured to transfer a fifth current in response to a reference value of the code for outputting the compensation current, and
wherein the magnitude of the compensation current is increased by a magnitude of the fifth current based on a value of the code being increased by the reference value.

7. The compensation circuit of claim 4 , wherein the magnitude of the compensation current corresponds to a sum of the magnitude of the second current and a magnitude of the fourth current.

8. The compensation circuit of claim 4 , wherein the second transistor includes a gate terminal receiving a first temperature dependent voltage, and
wherein a magnitude of the first temperature dependent voltage varies with a temperature.

9. The compensation circuit of claim 8 , wherein the fourth transistor comprises a gate terminal receiving a second temperature dependent voltage, and
wherein the magnitude of the sensing voltage is determined based further on a difference between the first temperature dependent voltage and the second temperature dependent voltage.

10. The compensation circuit of claim 4 , wherein the fourth transistor is selected from a second group of transistors based on the code, wherein the transistors of the second group of transistors are configured to have widths proportional to the first width, respectively.

11. The compensation circuit of claim 4 , wherein the current mirror circuit comprises:
a sixth transistor comprising a first end configured to output the compensation voltage, the sixth transistor configured to transfer the second current to the second transistor and to transfer the third current to the third transistor; and
a seventh transistor comprising a gate terminal electrically connected to a gate terminal of the sixth transistor, the seventh transistor configured to transfer the first current to the first transistor and to transfer the fourth current to the fourth transistor.

12. The compensation circuit of claim 1 , wherein the reference current generating circuit is configured to output the reference current of a fixed magnitude.

13. A compensation circuit comprising:
a reference current generating circuit configured to output a reference current of a fixed magnitude;
a compensation current generating circuit configured to output a compensation current having a magnitude selected proportionally to a magnitude of the reference current based on a code;
a current mirror circuit configured to output to the reference current generating circuit a first current based on the reference current, to output a second current based on the compensation current, and to output a compensation voltage based on the first current and the second current; and
an output transistor configured to output a sensing voltage based on the compensation voltage,
wherein a magnitude of the sensing voltage is associated with a magnitude of the second current such that the magnitude of the sensing voltage is a reference magnitude when the code is a reference value, and the magnitude of the second current is increased by the reference magnitude when a value of the code is increased by the reference value.

14. The compensation circuit of claim 13 , wherein the reference current generating circuit comprises a first transistor having a first width, the first transistor configured to transfer the first current for outputting the reference current,
wherein the compensation current generating circuit comprises a second transistor having a second width proportional to the first width of the first transistor, the second transistor configured to transfer the second current for outputting the compensation current.

15. The compensation circuit of claim 14 , wherein the second transistor is selected from a group of transistors based on the code, the transistors of the group of transistors having widths proportional to the first width.

16. The compensation circuit of claim 14 , wherein the compensation current generating circuit further comprises a third transistor configured to transfer a third current based on the second current transferred from the second transistor, and
wherein a magnitude of the compensation current is increased by a magnitude of the third current whenever the value of the code is increased by the reference value.

17. A voltage generating circuit compris

Assignees

• Samsung Electronics Co Ltd

Inventors

• Sarkar Surojit
• Kalluru Vivek Venkata
• Min Youngsun
• Lim Ji-Hoon

Classifications

• G11C5/147

  Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence) · CPC title

• G05F3/245 Primary

  producing a voltage or current as a predetermined function of the temperature · CPC title

• G11C7/14

  Dummy cell management; Sense reference voltage generators · CPC title

• G05F3/262 Primary

  using field-effect transistors only · CPC title

• G11C7/04

  with means for avoiding disturbances due to temperature effects · CPC title