Display panel with array substrate having thickness varying in packaging area, method of manufacturing display panel and display device

Patent metadata

Field	Value
Publication number	US-10613402-B2
Application number	US-201715792629-A
Country	US
Kind code	B2
Filing date	Oct 24, 2017
Priority date	May 22, 2017
Publication date	Apr 7, 2020
Grant date	Apr 7, 2020

Abstract

The present application discloses a display panel, a method of manufacturing the display panel, and a display device. The display panel comprises an array substrate, a cover plate and frame glue, wherein the array substrate comprises a first metal strip and a second metal strip arranged in a packaging area; in the packaging area on a given side of a display area, the first metal strip comprises a plurality of first metal lines, the second metal strip comprises a plurality of second metal lines, and the first metal lines and the second metal lines intersect; and the array substrate has a maximum thickness at locations where the first metal lines intercept second metal lines.

First claim

What is claimed is:

1. A display panel with an array substrate having a thickness varying in a packaging area, comprising the array substrate, a cover plate and frame glue for gluing the array substrate and the cover plate together, wherein the array substrate comprises a display area and the packaging area surrounding the display area, wherein the packaging area comprises a first metal layer and a second metal layer, and wherein the frame glue is arranged in the packaging area;
wherein the first metal layer comprises a plurality of first metal lines, the second metal layer comprises a plurality of second metal lines, and the plurality of first metal lines and the plurality of second metal lines intersect to form a net-like structure; and
wherein in a direction perpendicular to the display panel, the array substrate has a maximum thickness at locations where one of the plurality of first metal lines intercepts one of the plurality of second metal lines.

2. The display panel according to claim 1 , wherein the array substrate further comprises a first insulating sheet and a second insulating sheet arranged in the packaging area; and
the first insulating sheet covers the first metal layer, and the second insulating sheet covers the second metal layer.

3. The display panel according to claim 2 , wherein the array substrate further comprises a gate electrode layer, a first insulating layer, a source/drain electrode layer and an second insulating layer arranged in the display area; and
wherein the first insulating layer covers the gate electrode layer, and the second insulating layer covers the source/drain electrode layer.

4. The display panel according to claim 3 , wherein one of the first metal layer and the second metal layer is positioned in a same layer as the gate electrode layer and is manufactured in a same patterning process as the gate electrode layer, and the other one of the first metal layer and the second metal layer is positioned in a same layer as the source/drain electrode layer and is manufactured in a same patterning process as the source/drain electrode layer.

5. The display panel according to claim 3 , wherein the array substrate further comprises a shading metal layer and a third insulating layer arranged in the display area, and wherein the third insulating layer covers the shading metal layer; and
wherein one of the first metal layer and the second metal layer is disposed in a same layer as the shading metal layer and is manufactured in a same patterning process as the shading metal layer; and
wherein another one of the first metal layer and the second metal layer is disposed in a same layer as one of the gate electrode layer and the source/drain electrode layer and is manufactured in a same patterning process as the one of the gate electrode layer and the source/drain electrode layer.

6. The display panel according to claim 3 , wherein the array substrate further comprises a fourth metal layer and a fourth insulating layer arranged in the display area, and the fourth insulating layer covers the fourth metal layer; and
wherein one of the first metal layer and the second metal layer is positioned in a same layer as the fourth metal layer and is manufactured in a same patterning process as the fourth metal layer, and another one of the first metal layer and the second metal layer is positioned in a same layer as one of the gate electrode layer and the source/drain electrode layer and is manufactured in a same patterning process as the one of the gate electrode layer and the source/drain electrode layer.

7. The display panel according to claim 2 , wherein the first insulating sheet and/or the second insulating sheet comprise silicon nitride and silicon oxide.

8. The display panel according to claim 1 , wherein the display panel is an organic light-emitting display panel.

9. A method for manufacturing a display panel with an array substrate having a thickness varying in a packaging area, comprising:
providing the array substrate having a display area and the packaging area, wherein the packaging area surrounds the display area;
depositing a first metal film in the packaging area;
etching the first metal film to form a first metal layer;
depositing a first insulating sheet to cover the first metal layer in the packaging area;
depositing a second metal film over the first metal film in the packaging area;
etching the second metal film to form a second metal layer;
depositing a second insulating sheet to cover the second metal layer in the packaging area;
coating frame glue in the packaging area; and
placing a cover plate over the array substrate and curing the frame glue to attach the cover plate and the array substrate together,
wherein the array substrate comprises the first metal layer and the second metal layer in the packaging area on a side of the display area, wherein the first metal layer comprises a plurality of first metal lines, the second metal layer comprises a plurality of second metal lines, wherein the plurality of first metal lines and the plurality of second metal lines intersect; and
wherein in a direction perpendicular to the display panel, the array substrate has a maximum thickness at locations where one of the plurality of first metal lines intercepts one of the plurality of second metal lines.

10. The method according to claim 9 , wherein when the first insulating sheet is disposed between the first metal layer and the second metal layer, wherein the first insulating sheet is etched to form the first metal lines before the second metal film is deposited.

11. The method according to claim 9 , wherein when the first insulating sheet is positioned between the first metal layer and the second metal layer, the second insulating sheet in an area between the second metal lines is etched but is not etched through before the frame glue is coated.

12. The method according to claim 9 , further comprising:
forming a gate electrode layer in the display area;
covering the gate electrode layer in the display area to form a first insulating layer;
forming a source/drain electrode layer in the display area; and
covering the source/drain electrode layer in the display area to form a second insulating layer,
wherein the array substrate further comprises the gate electrode layer, the first insulating layer, the source/drain electrode layer and the second insulating layer.

13. The method according to claim 12 , wherein one of the first metal layer and the second metal layer is positioned in a same layer as the gate electrode layer and is manufactured in a same patterning process as the gate electrode layer, and another one of the first metal layer and the second metal layer is positioned in a same layer as the source/drain electrode layer and is manufactured in a same patterning process as the source/drain electrode layer.

14. The method according to claim 12 , further comprising:
forming a shading metal layer in the display area; and
covering the shading metal layer in the display area to form a third insulating layer,
wherein the array substrate further comprises the shading metal layer and the third insulating layer; and
one of the first metal layer and the second metal layer is positioned in a same layer as the shading metal layer and is manufactured in a same patterning process as the shading metal layer, and another one of the first metal layer and the second metal layer is positioned in a same layer as one of the gate electrode layer and the source/drain electrode layer and is manufactured in a same patterning process as the one of the gate electrode layer and the source/drain electrode

Assignees

• Shanghai Tianma Am Oled Co Ltd

Inventors

• Zhang Peng
• Su Congyi

Classifications

• G02F1/1345

  Conductors connecting electrodes to cell terminals · CPC title

• G02F1/1343

  Electrodes {(reflective electrodes G02F1/133553)} · CPC title

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/133345

  Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence) · CPC title

• G02F1/1339 Primary

  Gaskets; Spacers; Sealing of cells · CPC title