Power detector calibration in integrated circuits

Patent metadata

Field	Value
Publication number	US-10608756-B2
Application number	US-201816122680-A
Country	US
Kind code	B2
Filing date	Sep 5, 2018
Priority date	Sep 5, 2018
Publication date	Mar 31, 2020
Grant date	Mar 31, 2020

Abstract

A system and a method for calibrating an output signal of an antenna is disclosed. In one aspect, an apparatus includes a first digital adder configured to generate a gain offset by at least adding gain calibration data from non-volatile memory and gain command data from static memory. The apparatus further includes an amplitude gain circuit configured to modify, based at least in part on the gain offset, an amplitude of a first output signal of a first antenna. The modified amplitude of the first output signal is provided to enable pre-calibration of the first output signal. The apparatus further includes a power detector configured to measure an output power of the first output signal. The apparatus further includes at least one processor configured to generate a difference between the measured and expected output power, and adjust gain command data in response to the generated difference.

First claim

What is claimed is:

1. An apparatus comprising:
a first digital adder configured to at least generate a gain offset by at least adding gain calibration data from non-volatile memory and gain command data from static memory;
an amplitude gain circuit configured to at least modify, based at least in part on the gain offset, an amplitude of a first output signal of a first antenna, wherein the modified amplitude of the first output signal is provided to enable pre-calibration of the first output signal;
a power detector configured to at least measure an output power of the first output signal; and
at least one processor, configured to at least generate a difference between the measured output power and an expected output power, the at least one processor further configured to at least adjust gain command data in response to the difference between the measured output power and the expected output power.

2. The apparatus of claim 1 , wherein the power detector comprises:
an analog power detector configured to at least detect the signal power of the first output signal;
an analog-to-digital converter configured to at least digitize the detected signal level;
a non-volatile memory configured to at least provide an offset correction value; and
a combiner circuit configured to at least correct the digitized signal power with the offset correction value.

3. The apparatus of claim 2 , further comprising: a limiter circuit configured to at least apply a limit function to the corrected signal power.

4. The apparatus of claim 1 , further comprising: a plurality of antennas configured to at least provide a plurality of radio signals to a point in space where the plurality of radio signals constructively interfere with each other to form a directionally controlled beam, wherein the plurality of antennas includes the first antenna.

5. The apparatus of claim 4 , further comprising:
a second digital adder configured to at least generate a phase offset by at least adding phase calibration data obtained from the non-volatile memory and phase command data obtained from the static memory; and
a phase-shift circuit configured to at least modify, based at least in part on the phase offset, a phase of the first output signal, wherein the modified phase of the first output signal is provided to enable pre-calibration of the first output signal.

6. The apparatus of claim 1 , wherein the at least one processor is further configured to compare the generated difference between the measured output power and an expected output power to a threshold, and adjust gain command data iteratively until the generated difference is less than the threshold.

7. The apparatus of claim 1 , wherein at least the gain calibration data is programmed into the at least one non-volatile memory via burning of fuses, one-time programming, and/or electrically erasable programmable read-only memory.

8. A method, comprising:
generating, by a first digital adder, a gain offset by at least adding gain calibration data from at least one non-volatile memory and gain command data from at least one static memory;
modifying, by an amplitude gain circuit and based at least in part on the gain offset, an amplitude of a first output signal of a first antenna, wherein the modified amplitude of the first output signal is provided to enable pre-calibration of the first output signal;
measuring, by a power detector, an output power of the first output signal;
generating, by at least one processor, a difference between the measured output power and an expected output power; and
adjusting, by the at least one processor, gain command data in response to the difference between the measured output power and the expected output power.

9. The method of claim 8 , wherein measuring an output power of the first output signal comprises:
detecting, by an analog power detector, the signal power of the first output signal;
digitizing, by an analog-to-digital converter, the detected signal level;
providing, by a non-volatile memory, an offset correction value; and
correcting, by a combiner circuit, the digitized signal power with the offset correction value.

10. The method of claim 9 , wherein measuring the output power of the first output signal further comprises: applying, by a limiter circuit, a limit function to the corrected signal power.

11. The method of claim 8 , further comprising: providing, via a plurality of antennas, a plurality of radio signals to a point in space where the plurality of radio signals constructively interfere with each other to form a directionally controlled beam, wherein the plurality of antennas includes the first antenna.

12. The method of claim 11 , further comprising:
generating, by a second digital adder, a phase offset by at least adding phase calibration data obtained from the non-volatile memory and phase command data obtained from the static memory; and
modifying, by a phase-shift circuit and based at least in part on the phase offset, a phase of a first output signal, wherein the modified phase of the first output signal is provided to enable pre-calibration of the first output signal.

13. The method of claim 8 , further comprising:
comparing, by the at least one processor, the generated difference between the measured output power and an expected output power to a threshold; and
adjusting, by the at least one processor, gain command data, iteratively, until the generated difference is less than the threshold.

14. The method of claim 8 , wherein at least the gain calibration data is programmed into the non-volatile memory via burning of fuses, one-time programming, and/or electrically erasable programmable read-only memory.

15. An apparatus, comprising:
means for generating a gain offset by at least adding gain calibration data from non-volatile memory and gain command data from static memory;
means for modifying, based at least in part on the gain offset, an amplitude of a first output signal of a first antenna, wherein the modified amplitude of the first output signal is provided to enable pre-calibration of the first output signal;
means for measuring an output power of the first output signal;
means for generating a difference between the measured output power and an expected output power; and
means for adjusting gain command data in response to the difference between the measured output power and the expected output power.

16. The apparatus of claim 15 , wherein measuring the output power of the first output signal comprises:
means for detecting the signal power of the first output signal;
means for digitizing the detected signal level;
means for providing an offset correction value; and
means for correcting the digitized signal power with the offset correction value.

17. The apparatus of claim 16 , wherein measuring the output power of the first output signal comprises: means for applying a limit function to the corrected signal power.

18. The apparatus of claim 15 , further comprising: means for providing a plurality of radio signals to a point in space where the plurality of radio signals constructively interfere with each other to form a directionally controlled beam, wherein the means for providing a plurality of radio signals includes the first antenna.

19. The apparatus of claim 18 , further comprising:
means for generating a phase offset by at least adding phase calibration data obtained from the non-volatile memory and phase command data obtained from the static memory; and
means for modifying, based at least in part on th

Assignees

• Anokiwave Inc

Inventors

• Jain Vipul
• Gresham Robert Ian
• McMorrow Robert
• Corman David Warren
• Jain Nitin

Classifications

• G06F1/3206

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

• G06F1/28

  Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

• G06F1/3275

  Power saving in memory, e.g. RAM, cache · CPC title

• H04B17/12 Primary

  of transmit antennas, e.g. of the amplitude or phase · CPC title

• H03G3/3068

  Circuits generating control signals for both R.F. and I.F. stages · CPC title