Pipelined analog-to-digital converter

US10608658B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10608658-B2
Application numberUS-201616313185-A
CountryUS
Kind codeB2
Filing dateJul 4, 2016
Priority dateJul 4, 2016
Publication dateMar 31, 2020
Grant dateMar 31, 2020

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A pipelined ADC includes a first sub ADC and a second sub ADC. The second sub ADC is configured to receive, as an input, an analog residue generated by the first sub ADC. The first sub ADC is configured to operate in a first conversion phase, generating a digital output of the first sub ADC, and a second conversion phase, generating the analog residue. The first sub ADC includes a reference-voltage generator circuit configured to generate a reference voltage of the first sub ADC and having a first mode of operation and a second mode of operation, in which the noise power of the reference voltage is less than in the first mode of operation. The reference-voltage generator circuit is configured to operate in its first mode of operation in the first conversion phase and in its second mode of operation in the second conversion phase.

First claim

Opening claim text (preview).

The invention claimed is: 1. A pipelined analog-to-digital converter (ADC), comprising: a first sub ADC; and a second sub ADC configured to receive, as an input, an analog residue generated by the first sub ADC; wherein the first sub ADC is configured to operate in: a first conversion phase in which it generates a digital output of the first sub ADC; and a second conversion phase in which it generates the analog residue; wherein the first sub ADC comprises a reference-voltage generator circuit: configured to generate a reference voltage of the first sub ADC; having a first mode of operation; having a second mode of operation in which a noise power of the reference voltage is less than in the first mode of operation; and configured to operate in its first mode of operation in the first conversion phase and in its second mode of operation in the second conversion phase. 2. The pipelined ADC of claim 1 , wherein the reference-voltage generator circuit dissipates less power in the first mode of operation than in the second mode of operation. 3. The pipelined ADC of claim 1 , wherein the reference voltage generator circuit is configured to have a first bandwidth in the first mode of operation and a second bandwidth, lower than the first bandwidth, in the second mode of operation. 4. The pipelined ADC of claim 3 , wherein the reference voltage generator circuit comprises a switchable filter having the first bandwidth in the first mode of operation and the second bandwidth in the second mode of operation. 5. The pipelined ADC of claim 4 : wherein the reference-voltage generator circuit comprises a voltage source; and wherein the switchable filter comprises: a first resistor connected between an output of the voltage source and a first node; a second resistor connected between the output of the voltage source and a second node; a first capacitor connected between the first node and a signal ground node; a second capacitor connected between the second node and a signal ground node; a first switch connected between the first node and an output node of the reference-voltage generator circuit and configured to connect the first node to the output node of the reference voltage generator circuit in the first mode of operation; and a second switch connected between the second node and the output node of the reference-voltage generator circuit and configured to connect the second node to the output node of the reference voltage generator circuit in the second mode of operation. 6. The pipelined ADC of claim 5 , wherein the second capacitor has a higher capacitance than the first capacitor. 7. The pipelined ADC of claim 4 : wherein the reference-voltage generator circuit comprises a first voltage source and a second voltage source; and wherein the switchable filter comprises: a first resistor connected between an output of the first voltage source and a first node; a second resistor connected between an output of the second voltage source and a second node; a first capacitor connected between the first node and a signal ground node; a second capacitor connected between the second node and a signal ground node; a first switch connected between the first node and an output node of the reference-voltage generator circuit and configured to connect the first node to the output node of the reference voltage generator circuit in the first mode of operation; and a second switch connected between the second node and the output node of the reference-voltage generator circuit and configured to connect the second node to the output node of the reference voltage generator circuit in the second mode of operation. 8. The pipelined ADC of claim 4 : wherein the reference-voltage generator circuit comprises a voltage source; and wherein the switchable filter comprises: a first resistor connected between an output of the voltage source and an output node of the reference voltage generator circuit; a second resistor configured to be switched in parallel with the first resistor in the first mode of operation; a first capacitor connected between the output node of the reference voltage generator circuit and a signal ground node; and a second capacitor configured to be switched in in parallel with the first capacitor in the second mode of operation. 9. A method of operating a pipelined analog-to-digital converter (ADC); the pipelined ADC comprising a first sub ADC and a second sub ADC; wherein the second sub ADC is configured to receive, as an input, an analog residue generated by the first sub ADC; wherein the first sub ADC is configured to operate in 1) a first conversion phase in which it generates a digital output of the first sub ADC, and 2) a second conversion phase in which it generates the analog residue; wherein the first sub ADC comprises a reference-voltage generator circuit configured to generate a reference voltage of the first sub ADC; wherein the reference-voltage generator circuit has a first mode of operation and a second mode of operation; wherein a noise power of the reference voltage is less in the second mode of operation than in the first mode of operation; the method comprising: operating the reference-voltage generator circuit in its first mode of operation in the first conversion phase; and operating the reference-voltage generator circuit in its second mode of operation in the second conversion phase. 10. The method of claim 9 , wherein the reference-voltage generator circuit dissipates less power in the first mode of operation than in the second mode of operation. 11. The method of claim 9 , wherein the reference voltage generator circuit is configured to have a first bandwidth in the first mode of operation and a second bandwidth, lower than the first bandwidth, in the second mode of operation. 12. The method of claim 11 , wherein the reference voltage generator circuit comprises a switchable filter having the first bandwidth in the first mode of operation and the second bandwidth in the second mode of operation. 13. The method of claim 12 : wherein the reference-voltage generator circuit comprises a voltage source; wherein the switchable filter comprises: a first resistor connected between an output of the voltage source and a first node; a second resistor connected between the output of the voltage source and a second node; a first capacitor connected between the first node and a signal ground node; and a second capacitor connected between the second node and a signal ground node; wherein operating the reference voltage generator circuit in its first mode of operation comprises connecting the first node to an output node of the reference voltage generator circuit; and wherein operating the reference voltage generator circuit in its second mode of operation comprises connecting the second node to the output node of the reference voltage generator circuit. 14. The method of claim 13 , wherein the second capacitor has a higher capacitance than the first capacitor. 15. The method of claim 12 : wherein the reference-voltage generator circuit comprises a first voltage source and a second voltage source; wherein the switchable filter comprises: a first resistor connected between an output of the first voltage source and a first node; a second resistor connected between an output of the second voltage source and a second node; a first capacitor connected between the first node and a signal ground node; and a second capacitor connected between the second node and a signal ground node; wherein operating the reference voltage generator circuit in its first mod

Assignees

Inventors

Classifications

  • H03M1/164Primary

    the steps being performed sequentially in series-connected stages (H03M1/161 takes precedence) · CPC title

  • sequentially only, e.g. successive approximation type (converting more than one bit per step H03M1/14) · CPC title

  • of noise {(H03M1/0617 takes precedence)} · CPC title

  • Details of sampling arrangements or methods · CPC title

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What does patent US10608658B2 cover?
A pipelined ADC includes a first sub ADC and a second sub ADC. The second sub ADC is configured to receive, as an input, an analog residue generated by the first sub ADC. The first sub ADC is configured to operate in a first conversion phase, generating a digital output of the first sub ADC, and a second conversion phase, generating the analog residue. The first sub ADC includes a reference-vol…
Who is the assignee on this patent?
Ericsson Telefon Ab L M
What technology area does this patent fall under?
Primary CPC classification H03M1/164. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 31 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).