Linear amplifier having higher efficiency for envelope tracking modulator

Patent metadata

Field	Value
Publication number	US-10608592-B2
Application number	US-201815871045-A
Country	US
Kind code	B2
Filing date	Jan 14, 2018
Priority date	Feb 23, 2017
Publication date	Mar 31, 2020
Grant date	Mar 31, 2020

Abstract

A linear amplifier is provided to have higher efficiency for an envelope tracking modulator. In one embodiment, a first stage amplifier circuit can be simply operated in a high gain mode or a high bandwidth mode for different applications, without using large chip area. In another embodiment, an output stage has a cascode structure whose dynamic range is controlled according to a voltage level of a supply voltage, to make a core device within the output stage have better protection and suitable dynamic range.

First claim

What is claimed is:

1. A linear amplifier, comprising:
a first stage amplifier circuit, comprising:
input circuits, for receiving differential input signals to generate amplified differential signals;
a first circuit;
a second circuit; and
a switch module, for coupling the input circuits to only one of the first circuit and the second circuit, wherein the input circuits are not coupled to the first circuit and the second circuit simultaneously;

wherein the input circuits are coupled to only one of the first circuit and the second circuit, and at least one of a bandwidth and a gain of the linear amplifier when the input circuits are coupled to the first circuit is different from the one of the bandwidth and the gain of the linear amplifier when the input circuits are coupled to the second circuit.

2. The linear amplifier of claim 1 , wherein each of the input circuits is a transistor comprising a gate electrode, a first electrode and a second electrode, the gate electrode is used to receive the differential input signal, the first electrode is coupled to a supply voltage, and the second electrode is used to output the amplified differential signal; and the bandwidth and the gain of the linear amplifier when the second electrodes of the input circuits are coupled to the first circuit are different from the bandwidth and the gain of the linear amplifier when the second electrodes of the input circuits are coupled to the second circuit.

3. The linear amplifier of claim 1 , wherein the linear amplifier has a higher bandwidth and lower gain when the input circuits are coupled to the first circuit than when the input circuits are coupled to the second circuit.

4. The linear amplifier of claim 3 , wherein the linear amplifier is applied to a transceiver, and when the transceiver operates in a time division duplex (TDD) mode, the switch module is controlled to couple the input circuits to the first circuit to make the linear amplifier have the higher bandwidth; and when the transceiver operates in a frequency division duplex (FDD) mode, the switch module is controlled to couple the input circuits to the second circuit to make the linear amplifier have the higher gain.

5. The linear amplifier of claim 1 , wherein when the first circuit and the second circuit have different equivalent impedances when it is coupled to the input circuits, to make the bandwidth and the gain of the linear amplifier when the input circuits are coupled to the first circuit are different from the bandwidth and the gain of the linear amplifier when the input circuits are coupled to the second circuit.

6. The linear amplifier of claim 5 , wherein the first circuit has higher equivalent impedance than the second circuit, and the linear amplifier has a higher bandwidth and lower gain when the input circuits are coupled to the first circuit than when the input circuits are coupled to the second circuit.

7. The linear amplifier of claim 6 , wherein each of the input circuits is a transistor comprising a gate electrode, a first electrode and a second electrode, the gate electrode is used to receive the differential input signal, the first electrode is coupled to a supply voltage, and the second electrode is used to output the amplified differential signal, and the first circuit comprises:
a first transistor, wherein a first electrode of the first transistor is selectively coupled to the second electrode of one of the input circuits via the switch module, a second electrode of the first transistor is coupled to another supply voltage, and a gate electrode the first transistor is connected to the first electrode via a resistor; and
a second transistor, wherein a first electrode of the second transistor is selectively coupled to the second electrode of the other one of the input circuits via the switch module, a second electrode of the second transistor is coupled to the other supply voltage, and a gate electrode the second transistor is connected to the first electrode via a resistor; and
the second circuit comprises:
a third transistor, wherein a first electrode of the third transistor is selectively coupled to the second electrode of one of the input circuits via the switch module, a second electrode of the third transistor is coupled to the other supply voltage, and a gate electrode the third transistor is directly connected to the first electrode; and
a fourth transistor, wherein a first electrode of the fourth transistor is selectively coupled to the second electrode of the other one of the input circuits via the switch module, a second electrode of the fourth transistor is coupled to the other supply voltage, and a gate electrode the fourth transistor is directly connected to the first electrode.

8. The linear amplifier of claim 1 , further comprising:
at least one inter-stage amplifier circuit, for generating a differential driving signal according to the amplified differential signal; and
an output stage, coupled to the inter-stage amplifier circuit and supplied by the supply voltage, for generating an output signal according to the differential driving signal, wherein the output stage has a cascode structure whose dynamic range is controlled according to a level of the supply voltage.

9. The linear amplifier of claim 8 , wherein the differential driving signal comprises a first driving signal and a second driving signal, and the output stage comprises:
a first cascode circuit, comprising:
a first output transistor, coupled to the supply voltage, for receiving the first driving signal; and
a first buffer transistor, coupled between the first output transistor and an output node of the output stage; and

a second cascode circuit, comprising:
a second output transistor, coupled to a ground voltage, for receiving the second driving signal; and
a second buffer transistor, coupled between the second output transistor and the output node of the output stage.

10. The linear amplifier of claim 9 , further comprising:
a control circuit, for controlling the first buffer transistor to have different impedances by referring to the level of the supply voltage.

11. The linear amplifier of claim 10 , wherein the control circuit controls the first buffer transistor to have lower impedance when the supply voltage is lower than a threshold voltage.

12. The linear amplifier of claim 11 , wherein the first output transistor and the first buffer transistor are P-type metal-oxide semiconductors (PMOS), a source electrode of the first buffer transistor is coupled to a drain electrode of the first output transistor; and when the supply voltage is greater than a threshold voltage, the control circuit controls the source electrode of the first buffer transistor to have a reference voltage; and when the supply voltage is lower than the threshold voltage, the control circuit controls a gate electrode of the first buffer transistor to connect to the ground voltage.

13. The linear amplifier of claim 12 , wherein the output stage further comprises:
an operational amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the source electrode of the first buffer transistor, the second input terminal is coupled to the reference voltage; and
a switch, for selectively connecting the gate electrode of the first buffer transistor to the output terminal of the operational amplifier or to the ground voltage by referring to the level of the supply voltage.

14. The linear amplifier of claim 9 , wherein the first output transistor and the second output transistor are core devices, and the first buffer transistor and

Assignees

• Mediatek Inc

Inventors

• Ho Chen-Yen
• Lin Yu-Hsin

Classifications

• H03F3/45183

  Long tailed pairs (H03F3/4521, H03F3/45237 take precedence) · CPC title

• H03F2203/30132

  the push transistor being gated by a switching element · CPC title

• H03F2203/45141

  A cross coupled pair of transistors being added in the input circuit of a differential amplifier · CPC title

• H03F2203/30117

  the push circuit of the SEPP amplifier being a cascode circuit · CPC title

• H03F2203/45702

  the LC comprising two resistors · CPC title