Vehicular radar sensing system utilizing high rate true random number generator

Patent metadata

Field	Value
Publication number	US-10605894-B2
Application number	US-201715662409-A
Country	US
Kind code	B2
Filing date	Jul 28, 2017
Priority date	Apr 25, 2016
Publication date	Mar 31, 2020
Grant date	Mar 31, 2020

Abstract

A radar sensing system for a vehicle includes transmit and receive pipelines. The transmit pipeline includes transmitters able to transmit radio signals. The receive pipeline includes receivers able to receive radio signals. The received radio signals include transmitted radio signals that are reflected from an object. The transmitters phase modulate the radio signals before transmission, as defined by a first binary sequence. The receive pipeline comprises at least one analog to digital converter (ADC) for sampling the received radio signals. The first binary sequence is defined by least significant bit (LSB) outputs from the at least one ADC.

First claim

The invention claimed is:

1. A radar sensing system for a vehicle, the radar sensing system comprising:
a transmit pipeline configured for installation and use on a vehicle, wherein the transmit pipeline comprises a transmitter configured to transmit radio signals;
a receive pipeline configured for installation and use on the vehicle, wherein the receive pipeline comprises a receiver configured to receive radio signals, and wherein the received radio signals include transmitted radio signals reflected from an object in the environment;
wherein the transmitter is configured to modulate the radio signals before transmission;
wherein the transmit pipeline is configured to control modulation of the radio signals, and wherein the modulation is defined at least in part by a first binary sequence;
wherein the receive pipeline comprises at least one analog-to-digital converter (ADC) configured to sample the received radio signals and generate bits based on the sampled radio signal; and
wherein the transmit pipeline is configured to derive the first binary sequence at least in part from a first bit stream derived from a sequence of bit outputs selected from the bits generated by the at least one ADC, and wherein the sequence of bit outputs selected from the bits generated by the at least one ADC comprises a sequence of least significant bit (LSB) outputs.

2. The radar sensing system of claim 1 , wherein the transmitter is further configured to phase modulate the radio signals before transmission.

3. The radar sensing system of claim 1 , wherein the sequence of least significant bit (LSB) outputs is defined at least in part by thermal noise present in the receive pipeline.

4. The radar sensing system of claim 1 , wherein the at least one ADC comprises a first ADC and a second ADC, and wherein the first ADC is configured to sample the received radio signals via an in-phase (I) channel of the receiver, and wherein the second ADC is configured to sample the received radio signals via a quadrature (Q) channel of the receiver.

5. The radar sensing system of claim 4 , wherein the first bit stream is derived from bits generated by the first ADC and the second ADC.

6. The radar sensing system of claim 4 further comprising (i) a first processor configured to derive a first stream of truly random bits from the bits generated by the first ADC, and (ii) a second processor configured to derive a second stream of truly random bits from the bits generated by the second ADC, wherein the transmit pipeline is configured to derive the first bit stream from a combination of the first stream of truly random bits and the second stream of truly random bits.

7. The radar sensing system of claim 6 , wherein the first and second processors each comprise a two-bit shift register, a logic device, and a first-in, first-output (FIFO) coupled to a serial-to-parallel converter, wherein the first processor is configured to derive the first stream of truly random bits from the bits generated by the first ADC by comparing consecutive bits of the bits generated by the first ADC, and wherein the second processor is configured to derive the second stream of truly random bits from the bits generated by the second ADC by comparing consecutive bits of the bits generated by the second ADC.

8. The radar sensing system of claim 6 further comprising a bit interleaver configured to combine the first and second streams of truly random bits into the first bit stream.

9. A method for generating binary values for a vehicle radar sensing system, the method comprising:
providing a radar sensing system comprising (i) a transmitter configured for installation and use on a vehicle, and configured to transmit radio signals, and (ii) a receiver configured for installation and use on the vehicle, and configured to receive radio signals, wherein the received radio signals include transmitted radio signals that are reflected from an object in the environment;
modulating the radio signals before the radio signals are transmitted;
controlling the modulation of the radio signals, wherein the modulation is defined by a first binary sequence;
sampling the received radio signals with at least one analog-to-digital converter (ADC) and generating bits based on the sampled radio signal;
deriving a first bit stream from a sequence of bit outputs selected from the bits generated by the at least one ADC, wherein the sequence of bit outputs selected from the bits generated by the at least one ADC comprises a sequence of least significant bit (LSB) outputs; and
deriving the first binary sequence at least in part from the first bit stream.

10. The method of claim 9 , wherein modulating the radio signals comprises phase modulating the radio signals.

11. The method of claim 9 , wherein the sequence of least significant bit (LSB) outputs generated by the at least one ADC is defined at least in part by thermal noise present in the receiver.

12. The method of claim 9 , wherein sampling the received radio signals with at least one ADC comprises sampling the received radio signals with a first ADC of the at least one ADC and a second ADC of the at least one ADC, wherein the first ADC samples the received radio signals via an in-phase (I) channel of the receiver, and wherein the second ADC samples the received radio signals via a quadrature (Q) channel of the receiver.

13. The method of claim 12 , wherein deriving a first bit stream comprises deriving the first bit stream from sequences of bit outputs selected from the bits generated by the first ADC and the second ADC.

14. The method of claim 12 further comprising deriving a first stream of truly random bits from the bits generated by the first ADC, and deriving a second stream of truly random bits from the bits generated by the second ADC, wherein deriving a first bit stream comprises deriving the first bit stream from a combination of the first stream of truly random bits and the second stream of truly random bits.

15. The method of claim 14 , wherein deriving the first stream of truly random bits comprises deriving a stream of truly random bits from bits generated by the first ADC by comparing consecutive bits of the bits generated by the first ADC, and wherein deriving the second stream of truly random bits comprises deriving a stream of truly random bits from bits generated by the second ADC by comparing consecutive bits of the bits generated by the second ADC.

16. A radar sensing system for a vehicle, the radar sensing system comprising:
a transmit pipeline configured for installation and use on a vehicle, wherein the transmit pipeline comprises a transmitter configured to transmit radio signals;
a receive pipeline configured for installation and use on the vehicle, wherein the receive pipeline comprises a receiver configured to receive radio signals, and wherein the received radio signals include transmitted radio signals reflected from an object in the environment;
wherein the transmitter is configured to modulate the radio signals before transmission;
wherein the transmit pipeline is configured to control modulation of the radio signals, and wherein the modulation is defined at least in part by a first binary sequence;
wherein the receiver comprises a first analog-to-digital converter (ADC) and a second ADC, wherein the first ADC is configured to sample the received radio signal via an in-phase (I) channel of the receiver and to generate bits based on the sampled radio signal, and wherein the second ADC is configured to sample the received radio signal via a quadrature (Q) channel of the receiver and to generate bits base

Assignees

• Uhnder Inc

Inventors

• Davis Curtis
• Hegde Manju
• Stark Wayne E
• Lovberg John

Classifications

• G01S2013/93272

  in the back of the vehicles · CPC title

• G01S2013/93274

  on the side of the vehicles · CPC title

• G01S2013/9321

  Velocity regulation, e.g. cruise control · CPC title

• G01S7/352 Primary

  Receivers · CPC title

• G01S7/35

  Details of non-pulse systems · CPC title