Peak current detection for compensating errors in a power converter

US10601323B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10601323-B2
Application numberUS-201715843354-A
CountryUS
Kind codeB2
Filing dateDec 15, 2017
Priority dateDec 15, 2017
Publication dateMar 24, 2020
Grant dateMar 24, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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A power converter which converts electrical power at an input voltage into electrical power at an output voltage is presented. It has a power stage with a high side switching element, a low side switching element and an inductor. The power converter has a voltage-to-current converter coupled to the power stage to convert a voltage indicative of a current flowing into the inductor into an indicator current. A peak current detector receives the indicator current to determine a pedestal component of the indicator current in a first time interval during which the high side switching element is open, and to generate a calibrated indicator current by subtracting the pedestal component from the indicator current. The peak current detector compares the calibrated indicator current with a threshold value for detecting a more precise peak current flowing into the inductor, taking into account the effects of temperature or circuit aging.

First claim

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What is claimed is: 1. A power converter configured to convert electrical power at an input voltage at an input terminal into electrical power at an output voltage at an output terminal, wherein the power converter comprises a power stage with a high side switching element connected between the input terminal and a switching terminal, and a low side switching element connected between the switching terminal and a reference terminal, a voltage-to-current converter coupled to the power stage and configured to convert a voltage indicative of a current flowing into an inductor into an indicator current; and a peak current detector configured to receive said indicator current at an input node, to determine a pedestal component of the indicator current in a first time interval during which the high side switching element is open, and to generate a calibrated indicator current by subtracting the pedestal component from the indicator current; wherein the peak current detector is configured to compare said calibrated indicator current with a threshold current value for detecting a peak of the current flowing into the inductor; wherein the peak current detector further comprises a transistor and a capacitor, wherein a gate of the transistor is coupled to a terminal of the capacitor such that the pedestal component of the indicator current flowing from the input node through said transistor during said first time interval causes said capacitor to be charged to a pedestal voltage indicative of said pedestal component of the indicator current, and wherein the peak current detector further comprises a comparator and a first switch configured to connect, during a second time interval during which the high side switching element is closed, the input node of the peak current detector with an input of the comparator such that the calibrated indicator current is branched off from the indicator current. 2. The power converter according to claim 1 , wherein the peak current detector is configured to generate the calibrated indicator current by subtracting the pedestal component from the indicator current in a second time interval during which the high side switching element is closed. 3. The power converter according to claim 1 , wherein the peak current detector further comprises a resistor coupled between the input of said comparator and the reference terminal. 4. The power converter according to claim 1 , wherein the power stage further comprises a replica transistor coupled to the switching terminal, wherein a gate of the replica transistor is coupled to a gate of the high side switching element, and wherein the voltage indicative of the current flowing into the inductor is provided at a terminal of the replica transistor. 5. The power converter according to claim 1 , wherein the voltage-to-current converter comprises at least one current mirror. 6. The power converter according to claim 1 , wherein the voltage-to-current converter comprises at least two current sources. 7. The power converter according to claim 2 , wherein the peak current detector further comprises an error amplifier configured to compare a voltage at the input node with a reference voltage, and a second switch configured to connect, during the first time interval, an output of the error amplifier with a terminal of the capacitor. 8. A method of converting electrical power at an input voltage at an input terminal of a power converter into electrical power at an output voltage at an output terminal of the power converter, wherein the method comprises: connecting, within a power stage of the power converter, a high side switching element between the input terminal and a switching terminal, and a low side switching element between the switching terminal and a reference terminal, converting, using a voltage-to-current converter coupled to the power stage, a voltage indicative of a current flowing into an inductor into an indicator current, receiving said indicator current at an input node of a peak current detector, determining a pedestal component of the indicator current in a first time interval during which the high side switching element is open, generating a calibrated indicator current by subtracting the pedestal component from the indicator current, and comparing, by the peak current detector, said calibrated indicator current with a threshold current value for detecting a peak of the current flowing into the inductor; wherein the peak current detector further comprises a transistor and a capacitor, wherein the method comprises: coupling a gate of the transistor to a terminal of the capacitor such that the pedestal component of the indicator current flowing from the input node through said transistor during said first time interval causes said capacitor to be charged to a pedestal voltage indicative of said pedestal component of the indicator current; and wherein the peak current detector further comprises a comparator and a first switch, wherein the method comprises: connecting, by the first switch, during a second time interval during which the high side switching element is closed, the input node of the peak current detector with an input of the comparator such that the calibrated indicator current is branched off from the indicator current. 9. The method of claim 8 , further comprising generating, by the peak current detector, the calibrated indicator current by subtracting the pedestal component from the indicator current in a second time interval during which the high side switching element is closed. 10. The method of claim 8 , further comprising providing a resistor between the input of said comparator and the reference terminal. 11. The method of claim 8 , further comprising arranging an error amplifier and a second switch within the peak current detector, comparing, using the error amplifier, a voltage at the input node with a reference voltage, and connecting, using the second switch, during the first time interval, an output of the error amplifier with a terminal of the capacitor. 12. The method of claim 8 , further comprising coupling a replica transistor to the switching terminal of the power stage and coupling a gate of the replica transistor to a gate of the high side switching element such that the voltage indicative of the current flowing into the inductor is provided at a terminal of the replica transistor. 13. The method of claim 8 , further comprising providing at least one current mirror within the voltage-to-current converter. 14. The method of claim 8 , further comprising providing at least two current sources within the voltage-to-current converter.

Assignees

Inventors

Classifications

  • Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • Peak detectors (measuring characteristics of individual pulses G01R29/02) · CPC title

  • H02M3/1588Primary

    comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence) · CPC title

  • Electricity · mapped topic

  • Devices or circuits for detecting current in a converter · CPC title

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What does patent US10601323B2 cover?
A power converter which converts electrical power at an input voltage into electrical power at an output voltage is presented. It has a power stage with a high side switching element, a low side switching element and an inductor. The power converter has a voltage-to-current converter coupled to the power stage to convert a voltage indicative of a current flowing into the inductor into an indica…
Who is the assignee on this patent?
Dialog Semiconductor Uk Ltd
What technology area does this patent fall under?
Primary CPC classification H02M3/1588. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 24 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).