Semiconductor device and manufacture thereof

Patent metadata

Field	Value
Publication number	US-10600650-B2
Application number	US-201815964447-A
Country	US
Kind code	B2
Filing date	Apr 27, 2018
Priority date	Apr 28, 2017
Publication date	Mar 24, 2020
Grant date	Mar 24, 2020

Abstract

A semiconductor device and its manufacturing method, relating to semiconductor techniques. The semiconductor device manufacturing method comprises: forming a patterned first hard mask layer on a substrate to define a position for buried layers; conducting a first ion implantation using the first hard mask layer as a mask to form a first buried layer and a second buried layer both having a first conductive type and separated from each other at two sides of the first hard mask layer in the substrate; conducting a second ion implantation to form a separation region with a second conductive type opposite to the first conductive type in the substrate between the first and the second buried layers; removing the first hard mask layer; and forming a semiconductor layer on the substrate. This inventive concept reduces an area budget of a substrate and simplifies the manufacturing process.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate, comprising:
a first buried layer and a second buried layer separated from each other;
a separation region between the first buried layer and the second buried layer;
a first doped region underneath the first buried layer; and
a second doped region underneath the second buried layer, and

a semiconductor layer positioned on the substrate and comprising a diffuse portion, wherein the diffuse portion overlaps the separation region, wherein a dopant of the diffuse portion is identical to a dopant of the separation region, wherein the first and the second buried layers both have a first conductive type, while the separation region, the first doped region, and the second doped region all have a second conductive type opposite to the first conductive type.

2. The semiconductor device of claim 1 , wherein the first and the second buried layers both comprise a first dopant and a second dopant, with the second dopant having a lighter atomic weight than the first dopant,
and wherein the semiconductor layer comprises a first diffuse region on the first buried layer and a second diffuse region on the second buried layer, with the first and the second diffuse regions both comprising the second dopant.

3. The semiconductor device of claim 2 , wherein the diffuse portion directly contacts the separation region.

4. The semiconductor device of claim 3 , further comprising:
a first connection component extending from an upper surface of the semiconductor layer to the first diffuse region;
a second connection component extending from the upper surface of the semiconductor layer to the second diffuse region; and
a third connection component extending from the upper surface of the semiconductor layer to the diffuse portion, wherein the first and the second connection components both have the first conductive type and the third connection component has the second conductive type.

5. The semiconductor device of claim 4 , further comprising:
a first contact in the first connection component, and a first contact component on the first contact;
a second contact in the second connection component, and a second contact component on the second contact; and
a third contact in the third connection component, and a third contact component on the third contact.

6. A semiconductor device, comprising:
a substrate, comprising:
a first buried layer and a second buried layer separated from each other in the substrate, wherein the first and the second buried layers both have a first conductive type and both comprise a first dopant and a second dopant, with the second dopant having a lighter atomic weight than the first dopant;
a semiconductor layer on the substrate, comprising a first diffuse region on the first buried layer and a second diffuse region on the second buried layer, with the first and the second diffuse regions both comprising the second dopant;
a first connection component extending from an upper surface of the semiconductor layer to the first diffuse region; and
a second connection component extending from the upper surface of the semiconductor layer to the second diffuse region, with the first and the second connection components both having the first conductive type.

7. The semiconductor device of claim 6 , further comprising:
a first contact in the first connection component, and a first contact component on the first contact; and
a second contact in the second connection component, and a second contact component on the second contact.

Assignees

• Semiconductor Mfg Int Shanghai Corp
• Semiconductor Mfg Int Beijing Corp

Inventors

• Jung Dae Sub
• Chen De Yan
• Yang Guang Li

Classifications

• H01L29/0623

  Electricity · mapped topic

• H01L21/0455

  Electricity · mapped topic

• H01L21/266

  Electricity · mapped topic

• H01L21/0465 Primary

  Electricity · mapped topic

• H01L21/74

  Electricity · mapped topic