Packet backpressure detection method, apparatus, and device

Patent metadata

Field	Value
Publication number	US-10599549-B2
Application number	US-201916250168-A
Country	US
Kind code	B2
Filing date	Jan 17, 2019
Priority date	Sep 30, 2016
Publication date	Mar 24, 2020
Grant date	Mar 24, 2020

Abstract

A packet backpressure detection method and apparatus are provided. The method includes: a device which having a Peripheral Component Interconnect Express (PCIe) port storing a plurality of packets for transmission in a packet queue and storing a packet that is to be transmitted next in a first buffer, where the queue comprises a plurality of packets that are to be transmitted via the PCIe port; and the queue is stored in a second buffer; recording a storage duration of each packet stored in the first buffer, and accumulating the storage duration of each packet stored in the first buffer; removing the packet from the first buffer after the packet is transmitted via the PCIe port; and generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.

First claim

What is claimed is:

1. A packet backpressure detection method by a device having a Peripheral Component Interconnect Express (PCIe) port, comprising:
storing a plurality of packets that are to be transmitted via the PCIe port in a packet queue in a first buffer and storing a packet that is to be transmitted next in a second buffer;
recording a storage duration of each packet stored in the second buffer;
removing the packet from the second buffer after the packet is transmitted via the PCIe port;
determining that packet backpressure occurs at the PCIe port, when recorded storage duration of any packet in the second buffer reaches a first value, wherein the first value is less than a second value; and
generating an indication of packet backpressure at the PCIe port.

2. The method according to claim 1 , wherein the method comprises:
accumulating the storage duration of each packet stored in the second buffer;
determining that packet backpressure occurs at the PCIe port, when the accumulated storage duration reaches the second value, generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.

3. The method according to claim 1 , wherein:
the second buffer stores a maximum of one packet at any moment.

4. The method according to claim 1 , further comprising:
the second buffer stores at least two packets of one packet at any moment, the first buffer is smaller in size than the second buffer.

5. The method according to claim 2 , further comprising:
resetting the accumulated storage duration to 0 in a preset condition.

6. The method according to claim 5 , wherein the step of resetting by device comprises:
setting a reset timer, performing timing, and when a time recorded by the reset timer reaches a second value, resetting the accumulated storage duration to 0.

7. The method according to claim 5 , wherein the step of resetting by the device comprises:
recording a quantity of packets that have been stored in the second buffer, and when the quantity reaches a third value, resetting the accumulated storage duration to 0.

8. The method according to claim 1 , wherein the storage duration that is of each packet and is successively recorded by the device forms a duration queue, and the method further comprises:
when a length of the duration queue reaches a fourth value, deleting the earliest-recorded storage duration from the duration queue, and subtracting, from the accumulated storage duration, the earliest-recorded storage duration that is deleted from the duration queue.

9. The method according to claim 1 , wherein the storing a packet in a packet queue that is to be transmitted next in a second buffer comprises:
when each packet in a packet queue in a first direction of the PCIe port becomes a packet that is to be transmitted next in the second buffer at the PCIe port, storing, in the second buffer, the packet that needs to be sent in the first direction, wherein the first direction is an upstream direction or a downstream direction of the PCIe port; and
the method further comprises:
when each packet in a packet queue in a second direction of the PCIe port becomes a packet that is to be transmitted next in the second buffer at the PCIe port, storing, in a third buffer, the packet that needs to be sent in the second direction, wherein the second direction is opposite to the first direction, the packet stored in the third buffer is removed from the third buffer after being sent by using the PCIe port, and the third buffer stores a maximum of one packet at any moment;
recording storage duration of each packet stored in the third buffer, and accumulating the recorded storage duration of each packet stored in the third buffer;
removing the packet from the third buffer after the packet is transmitted via the PCIe port; and
when the second accumulated duration reaches the sixth value, generating a second indication of packet pressure at the PCIe port based on the second accumulated storage duration.

10. A packet backpressure detection device, comprising a processor, a memory, and a PCIe port, the memory having a plurality of instructions stored thereon, that when executed by the processor, cause the processor to:
store a plurality of packets that are to be transmitted via the PCIe port in a packet queue in a first buffer and store a packet that is to be transmitted next in a second buffer;
record a storage duration of each packet stored in the second buffer;
remove the packet from the second buffer after the packet is transmitted via the PCIe port;
determine that packet backpressure occurs at the PCIe port, when recorded storage duration of any packet in the second buffer reaches a first value, wherein the first value is less than the second value;
generate an indication of packet backpressure at the PCIe port.

11. The method according to claim 10 , wherein when executed by the processor, cause the processor to:
accumulating the storage duration of each packet stored in the second buffer;
determine that packet backpressure occurs at the PCIe port, when the accumulated storage duration reaches a first value, generate an indication of packet pressure at the PCIe port based on the accumulated storage duration.

12. The packet backpressure detection device according to claim 10 , wherein:
the second buffer stores a maximum of one packet at any moment.

13. The packet backpressure detection device according to claim 10 , wherein:
the second buffer stores at least two packets of one packet at any moment, the first buffer is smaller in size than the second buffer.

14. The packet backpressure detection device according to claim 11 , wherein the processor is configured to:
reset the accumulated duration to 0 in a preset condition.

15. The packet backpressure detection device according to claim 14 , wherein the processor is configured to:
set a resetting timer, performing timing, and when a time recorded by the resetting timer reaches a second value, resetting the accumulated duration to 0.

16. The packet backpressure detection device according to claim 14 , wherein the processor is configured to:
record a quantity of packets that have been stored in the second buffer, and when the quantity reaches a third value, reset the accumulated duration to 0.

17. The packet backpressure detection device according to claim 10 , wherein the processor is configured to:
when a length of the duration queue reaches a fourth value, delete the earliest-recorded storage duration from the duration queue, and subtract, from the accumulated duration, the earliest-recorded storage duration that is deleted from the duration queue.

18. The packet backpressure detection device according to claim 10 , wherein the processor is configured to:
when each packet in a packet queue in a first direction of the PCIe port becomes a packet that is to be transmitted next in the first buffer at the PCIe port, store, in the second buffer, the packet that needs to be sent in the first direction, wherein the first direction is an upstream direction or a downstream direction of the PCIe port; and
when each packet in a packet queue in a second direction of the PCIe port becomes a packet that is to be transmitted next in the first buffer at the PCIe port, store, in a third buffer, the packet that needs to be sent in the second direction, wherein the second direction is opposite to the first direction, the packet stored in the third buffer is removed from the third buffer after being sent by using the PCIe port, and the third buffer st

Assignees

• Huawei Tech Co Ltd

Inventors

• Zhang Bin
• Chen Ligang
• Chen Jiahuai
• Xu Lixia

Classifications

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F13/20

  for access to input/output bus · CPC title

• G06F13/4269

  using a handshaking protocol, e.g. Centronics connection · CPC title

• G06F2213/0026

  PCI express · CPC title

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title