Laminate and core shell formation of silicide nanowire

US10593592B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10593592-B2
Application numberUS-201514975028-A
CountryUS
Kind codeB2
Filing dateDec 18, 2015
Priority dateJan 9, 2015
Publication dateMar 17, 2020
Grant dateMar 17, 2020

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Abstract

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Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide stack in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer.

First claim

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What is claimed is: 1. A method of processing a substrate, comprising: positioning a substrate in a process region of a process chamber, the substrate having a feature formed therein; depositing a metal silicide layer into the feature, the depositing comprising: depositing a metal layer comprising a transition metal into the feature, the metal layer being no more than 2 atoms thick, wherein the transition metal is selected from the group consisting of Nickel (Ni), Iron (Fe), Cobalt (Co), Chromium (Cr), and Manganese (Mn), and when the transition metal is Ni, the metal layer is deposited using a metal-containing precursor selected from the group consisting of (N,N′-di-tert-butyl-acetamidinato) 2 Ni, Ni[N(t-uut) 2 ], Ni(( t Bu 2 N) 2 CCH 3 ) 2 , bis(ethylpentadienyl)nickel, Ni[(C 2 H 5 )(C 5 H 4 ) 2 ], and di(tertiary-butyl)amidonickel; delivering a silicon-containing reactant to the metal layer, the substrate being maintained at a temperature between 25 degrees Celsius and 400 degrees Celsius, the silicon-containing reactant reacting with at least a portion of the metal layer; and while delivering the silicon-containing reactant to the metal layer, coupling a microwave power to the silicon-containing reactant to form a plasma from the silicon-containing reactant, wherein the microwave power is provided to the process region of the process chamber at a power level of from 10 W to 5000 W; and repeating the deposition of the metal silicide layer one or more times to deposit a metal silicide stack, wherein: while delivering the silicon-containing reactant to the metal layer, coupling an RF source power to the silicon-containing reactant to form a plasma from the silicon-containing reactant, or while coupling the microwave power to the silicon-containing reactant, exposing the silicon-containing reactant to a radiant energy, the radiant energy comprising UV light. 2. The method of claim 1 , wherein the metal layer is a monolayer. 3. The method of claim 1 , wherein the silicon-containing reactant comprises silane. 4. The method of claim 1 , wherein the metal silicide stack comprises nickel silicide or cobalt silicide. 5. The method of claim 1 , wherein the metal silicide stack has a thickness between about 10 Å and about 100 Å. 6. The method of claim 1 , wherein the metal silicide stack is formed as nanowires for semiconductor back-end interconnection structure. 7. The method of claim 1 , wherein when the transition metal is nickel, the metal silicide stack has a ratio of Ni element to Si element substantially between about 0.8:1 and about 2:1. 8. A method of processing a substrate in a process chamber, comprising: positioning a substrate in a process region of a process chamber, the substrate having a feature formed therein; depositing a metal silicide layer into a feature formed in the substrate, the depositing comprising: depositing a metal layer comprising a transition metal into the feature, the metal layer being no more than 2 atoms thick, wherein the transition metal is selected from the group consisting of Nickel (Ni), Iron (Fe), Chromium (Cr), and Manganese (Mn), and when the transition metal is Ni, the metal layer is deposited using a metal-containing precursor selected from the group consisting of (N,N′-di-tert-butyl-acetamidinato) 2 Ni, Ni[N(t-uut) 2 ], Ni(( t Bu 2 N) 2 CCH 3 ) 2 , bis(ethylpentadienyl)nickel, Ni[(C 2 H 5 )(C 5 H 4 ) 2 ], and di(tertiary-butyl)amidonickel; and exposing the metal layer to a plasma formed from a silicon-containing reactant using a first microwave power, the silicon-containing reactant reacting with at least a portion of the metal layer, wherein the first microwave power is provided to the process region of the process chamber at a power level of from 10 W to 5000 W, and wherein while exposing the metal layer to a plasma formed from a silicon-containing reactant, coupling an RF source power to the silicon-containing reactant to form a plasma from the silicon-containing reactant; repeating the deposition of the metal silicide layer one or more times to deposit a metal silicide stack; thermally treating the metal silicide stack at a temperature between 25 degrees Celsius and 400 degrees Celsius in the presence of radiant energy; and applying a second microwave power in the process chamber while thermally treating the metal silicide stack. 9. The method of claim 8 , wherein the metal layer is a monolayer. 10. The method of claim 8 , wherein the silicon-containing reactant is selected from a group consisting of silane (SiH 4 ), di-silane (Si 2 H 6 ), silicon tetrafluoride (SiF 4 ), silicon tetrachloride (SiCl 4 ), and dichlorosilane (SiH 2 Cl 2 ). 11. The method of claim 8 , wherein the radiant energy comprises UV radiation. 12. The method of claim 8 , wherein the metal silicide stack is formed as nanowires for semiconductor back-end interconnection structure. 13. The method of claim 8 , wherein when the transition metal is nickel, the metal silicide stack has a ratio of Ni element to Si element substantially between about 0.8:1 and about 2:1. 14. A method of processing a substrate, comprising: positioning a substrate in a process region of a process chamber, the substrate having a feature formed therein; depositing a nickel silicide layer into the feature, the depositing comprising: depositing a nickel layer into the feature, the nickel layer being a monolayer, wherein the nickel layer is deposited using a metal-containing precursor selected from the group consisting of (N,N′-di-tert-butyl-acetamidinato) 2 Ni, Ni[N(t-uut) 2 ], Ni(( t Bu 2 N) 2 CCH 3 ) 2 , bis(ethylpentadienyl)nickel, Ni[(C 2 H 5 )(C 5 H 4 ) 2 ], and di(tertiary-butyl)amidonickel; and exposing the nickel layer to a plasma formed from a silane using a first microwave power, the first microwave power being provided to the process region of the process chamber at a power level of from 10 W to 5000 W, the substrate being maintained at a temperature between 25 degrees Celsius and 400 degrees Celsius, the silane reacting with at least a portion of the nickel layer; repeating the deposition of the nickel silicide layer one or more times to deposit a nickel silicide stack, the nickel silicide stack having a ratio of Ni element to Si element substantially between about 0.8:1 and about 2:1; and applying a second microwave power in the process chamber while thermal treating the nickel silicide stack, wherein: while delivering the silane to the nickel layer, coupling an RF source power to the silane to form a plasma from the silane, or while coupling the first or second microwave power to the silane, exposing the silane to a radiant energy, the radiant energy comprising UV light. 15. The method of claim 14 , wherein the silane is selected from the group consisting of SiH 4 , Si 2 H 6 , SiH 2 Cl 2 , Si 4 H 10 , and Si 5 H 12 .

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What does patent US10593592B2 cover?
Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H01L21/76886. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 17 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).