Chip capacitor, circuit assembly, and electronic device

Patent metadata

Field	Value
Publication number	US-10593480-B2
Application number	US-201816031212-A
Country	US
Kind code	B2
Filing date	Jul 10, 2018
Priority date	Nov 2, 2012
Publication date	Mar 17, 2020
Grant date	Mar 17, 2020

Abstract

A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.

First claim

What is claimed is:

1. A chip capacitor, comprising:
a substrate having a longitudinal direction;
a first external electrode and a second external electrode formed on or over the substrate;
a capacitor element connected between the first external electrode and the second external electrode, the capacitor element extending in the longitudinal direction of the substrate; and
a diode connected between the first external electrode and the second external electrode, and in parallel to the capacitor element, the diode extending in the longitudinal direction of the substrate,
wherein the capacitor element includes
a lower electrode,
a capacitance film that is laminated on or over the lower electrode, and
an upper electrode facing the lower electrode across the capacitance film, and

wherein the upper electrode includes a trimming region capable of being fused, the trimming region having a line shape.

2. The chip capacitor according to claim 1 , wherein a cathode of the diode is connected to the first external electrode.

3. The chip capacitor according to claim 1 , wherein the first external electrode is a power-supply electrode.

4. The chip capacitor according to claim 1 , wherein the diode includes a bidirectional diode.

5. The chip capacitor according to claim 1 , wherein the substrate is a semiconductor substrate and the diode includes an impurity diffusion layer formed in the semiconductor substrate.

6. The chip capacitor according to claim 5 , wherein the lower electrode includes an impurity diffusion layer formed inside the semiconductor substrate.

7. The chip capacitor according to claim 1 , wherein the substrate is a semiconductor substrate,
the lower electrode includes an impurity diffusion layer formed inside the semiconductor substrate, and
the diode includes an impurity diffusion layer continuous to the impurity diffusion layer of the lower electrode.

8. The chip capacitor according to claim 1 , wherein the diode includes a portion formed in a region directly below at least one of the first external electrode and the second external electrode.

9. The chip capacitor according to claim 1 , wherein the entirety of the diode is formed in a region directly below at least one of the first external electrode and the second external electrode.

10. The chip capacitor according to claim 1 , wherein the diode includes a polysilicon film formed on the substrate.

11. The chip capacitor according to claim 1 , further comprising:
a first pad portion connected to the capacitor element; and
a second pad portion connected to the diode; and
wherein one of the first external electrode and the second external electrode is formed to extend across the first pad portion and the second pad portion to electrically connect the first pad portion and the second pad portion.

12. The chip capacitor according to claim 11 , further comprising:
an insulating layer disposed between the first pad portion and the second pad portion and separating the first pad portion and the second pad portion; and
wherein the first external electrode or the second external electrode extends across the insulating layer to be joined to both the first pad portion and the second pad portion.

13. The chip capacitor according to claim 1 , wherein each of the first external electrode and the second external electrode is formed to extend across a front surface and a side surface of the substrate and integrally has a front surface portion covering the front surface and a side surface portion covering the side surface.

14. The chip capacitor according to claim 1 , wherein
the lower electrode is connected to one of the first external electrode and the second external electrode, and
the upper electrode is connected to the other of the first external electrode and the second external electrode.

15. The chip capacitor according to claim 1 , wherein
the substrate has a plurality of trenches,
the lower electrode is formed on or over an inner surface of the plurality of trenches or inside the inner surface of the plurality of trenches,
the capacitance film is formed along the inner surface of the plurality of trenches, and
the upper electrode is embedded in the plurality of trenches via the capacitance film such that the upper electrode straddles the plurality of trenches and collectively covers the plurality of trenches.

16. The chip capacitor according to claim 15 , wherein the trench has a side wall surface intersecting a major surface of the substrate, and the capacitance film is formed along the side wall surface of the trench.

17. The chip capacitor according to claim 16 , wherein the upper electrode includes a polysilicon film.

18. The chip capacitor according to claim 15 , wherein
the capacitor element includes a plurality of capacitor components, and
a plurality of the trimming regions disconnectably connect each of the plurality of the capacitor components to the first external electrode and the second external electrode.

19. A chip capacitor, comprising:
a substrate having a longitudinal direction;
a first external electrode and a second external electrode formed on or over the substrate;
a capacitor element connected between the first external electrode and the second external electrode, the capacitor element extending in the longitudinal direction of the substrate; and
a diode connected between the first external electrode and the second external electrode, and in parallel to the capacitor element, the diode extending in the longitudinal direction of the substrate,
wherein the capacitor element includes:
a lower electrode,
a capacitance film that is laminated on or over the lower electrode, and
an upper electrode facing the lower electrode across the capacitance film,

wherein the upper electrode includes a trimming region capable of being fused, the trimming region having a line shape.

20. The chip capacitor according to claim 19 , wherein
the capacitor element includes a plurality of capacitor components connected in parallel between the first external electrode and the second external electrode, and
the plurality of capacitor components include:
a basic capacitance element, and
a plurality of adjusting capacitance elements respectively connected to the first external electrode and the second external electrode via a plurality of the trimming regions.

21. The chip capacitor according to claim 20 , wherein the plurality of adjusting capacitance elements have mutually parallel strip shapes, have one ends thereof aligned at a side of one of the first external electrode and the second external electrode, and are lined up in order of length, and
the basic capacitance element includes a connection portion, disposed adjacent to an adjusting capacitance element of shortest length among the plurality of adjusting capacitance elements and connected to the one external electrode, and a main portion, formed integral to the connection portion and so as to avoid the plurality of adjusting capacitance elements and widening as the other of the first external electrode and the second external electrode is approached.

22. The chip capacitor according to claim 1 , further comprising:
a resistor element connected between the first external electrode and the second external electrode, and in parallel to the capacitor element.

23. A circuit assembly, comprising:
the chip capacitor according to claim 1 ; and
a mounting substrate having lands, soldered to the fir

Assignees

• Rohm Co Ltd

Inventors

• Yamamoto Hiroki
• Watanabe Keishi
• Tamagawa Hiroshi

Classifications

• H05K1/111

  Pads for surface mounting, e.g. lay-out · CPC title

• H05K3/3436

  having an array of bottom contacts, e.g. pad grid array or ball grid array components · CPC title

• H01G4/40

  Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations · CPC title

• H01G4/232

  electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

• H01G2/06

  specially adapted for mounting on a printed-circuit support · CPC title