Solid state circuit breaker and motor driving system

Patent metadata

Field	Value
Publication number	US-10591547-B2
Application number	US-201715669384-A
Country	US
Kind code	B2
Filing date	Aug 4, 2017
Priority date	Aug 12, 2016
Publication date	Mar 17, 2020
Grant date	Mar 17, 2020

Abstract

A solid state circuit breaker, including a solid state switch, an inductor connected with the solid state switch in series and a fault detection circuit. The solid state switch has a gate electrode, a source electrode and a drain electrode. The fault detection circuit is used for detecting health status of the solid state switch and identifying fault type of the solid state switch in a condition that a fault occurs on the solid state switch based on one or more of a measured voltage between the source electrode and the drain electrode of the solid state switch, a measured voltage of two terminals of the inductor, a reference voltage and a switching control signal provided to the gate electrode of the solid state switch. A motor driving system having the solid state circuit breaker is further disclosed.

First claim

What is claimed is:

1. A solid state circuit breaker comprising:
a solid state switch having a gate electrode, a source electrode, and a drain electrode;
an inductor connected in series with the solid state switch;
a gate driving circuit configured to supply a switching control signal to the gate electrode;
a voltage measurement device configured to measure a voltage between the source electrode and the drain electrode; and
a fault detection circuit configured to detect whether an overheating fault occurs on the solid state switch based on the switching control signal and the measured voltage between the source electrode and the drain electrode, the overheating fault occurring when the switching control signal is a high level and the measured voltage between the source electrode and the drain electrode is greater than a predetermined voltage threshold.

2. The solid state circuit breaker of claim 1 , wherein the fault detection circuit comprises a field programmable gate array for outputting a string of codes.

3. The solid state circuit breaker of claim 1 , wherein the fault detection circuit detects whether the overheating fault occurs on the solid state switch based further on a curve of a resistance between the source electrode and the drain electrode versus a temperature of the solid state switch.

4. The solid state circuit breaker of claim 1 , wherein the fault detection circuit is further configured to detect whether a short circuit occurs on the solid state switch based on the switching control signal and the measured voltage between the source electrode and the drain electrode.

5. The solid state circuit breaker of claim 4 , wherein the short circuit occurs on the solid state switch when the switching control signal is a low level and the measured voltage between the source electrode and the drain electrode is zero.

6. The solid state circuit breaker of claim 1 , further comprising a second voltage measurement device configured to measure a voltage of two terminal of the inductor; and wherein the fault detection circuit is further configured to detect whether an open circuit occurs on the solid state switch based on the measured voltage of two terminals of the inductor, a reference voltage, and the switching control signal.

7. The solid state circuit breaker of claim 6 , wherein:
the fault detection circuit comprises a comparator configured to compare the measured voltage of two terminals of the inductor with the reference voltage and output a comparison result; and
the fault detection circuit is configured to detect whether the open circuit occurs on the solid state switch based on the comparison result and the switching control signal.

8. The solid state circuit breaker of claim 7 , wherein the fault detection circuit comprises:
a logic gate circuit;
a first RESET/SET (RS) trigger connected with the comparator via the logic gate circuit; and
a second RS trigger connected with a gate driving circuit of the switching control signal via the logic gate circuit.

9. The solid state circuit breaker of claim 8 , wherein:
a reset terminal of the first RS trigger is connected with the logic gate circuit and a set terminal of the first RS trigger is connected with the gate driving circuit of the switching control signal;
a reset terminal of the second RS trigger is connected with the logic gate circuit and a set terminal of the second RS trigger is connected with a gate driving circuit of a reverse signal of the switching control signal; and
the fault detection circuit is configured to detect whether the open circuit occurs on the solid state switch according to logic levels of an output terminal of the first RS trigger and an output terminal of the second RS trigger.

10. The solid state circuit breaker of claim 9 , wherein the logic gate circuit comprises:
a first NOT gate having an input terminal connected with the gate driving circuit of the switching control signal;
a first NAND gate having a first input terminal connected with an output terminal of the comparator and a second input terminal connected with the gate driving circuit of the switching control signal;
a second NAND gate having a first input terminal connected with the output terminal of the comparator and a second input terminal connected with an output terminal of the first NOT gate;
a second NOT gate having an input terminal connected with the output terminal of the second RS trigger;
a third NOT gate having an input terminal connected with the output terminal of the first RS trigger;
a first OR gate having a first input terminal connected with an output terminal of the first NAND gate, a second input terminal connected with an output terminal of the second NOT gate, and an output terminal connected with the reset terminal of the first RS trigger; and
a second OR gate having a first input terminal connected with an output terminal of the third NOT gate, a second input terminal connected with an output terminal of the second NAND gate, and an output terminal connected with the reset terminal of the second RS trigger.

11. The solid state circuit breaker of claim 6 , wherein:
the fault detection circuit further comprises a delay circuit configured to delay the switching control signal to obtain a delayed switching control signal; and
the fault detection circuit is configured to detect whether the open circuit occurs on the solid state switch based on the measured voltage of two terminals of the inductor, the reference voltage, and the delayed switching control signal.

12. The solid state circuit breaker of claim 11 , wherein the delay circuit comprises:
a first branch and a second branch connected in parallel, wherein the first branch comprises a first diode and a first resistor connected in series and the second branch comprises a second diode and a second resistor connected in series in reverse to the first branch; and
a capacitor connected with the first and the second branches.

13. A motor driving system comprising:
an electrical motor;
a power source for providing a DC voltage; and
a solid state circuit breaker coupled between the electric motor and power source, the solid state circuit breaker comprising:
a solid state switch having a gate electrode, a source electrode, and a drain electrode;
an inductor connected in series with the solid state switch;
a gate driving circuit configured to supply a switching control signal to the gate electrode;
a voltage measurement device configured to measure a voltage between the source electrode and the drain electrode; and
a fault detection circuit configured to detect whether an overheating fault occurs on the solid state switch based on the switching control signal and the measured voltage between the source electrode and the drain electrode, the overheating fault occurring when the switching control signal is a high level and the measured voltage between the source electrode and the drain electrode is greater than a predetermined voltage threshold.

14. The motor driving system of claim 13 , wherein the fault detection circuit comprises a field programmable gate array for outputting a string of codes.

15. The motor driving system of claim 13 , wherein the fault detection circuit detects whether the overheating fault occurs on the solid state switch based further on a curve of a resistance between the source electrode and the drain electrode versus a temperature of the solid state switch.

16. The motor driving system of claim 13 , further comprising a DC/AC converter coupled between the solid state circuit breaker and the electric motor.

Assignees

• Gen Electric
• General Elecric Company

Inventors

• Wu Tao
• Li Fei
• Liu Changjin

Classifications

• H02H3/044

  Checking correct functioning of protective arrangements, e.g. by simulating a fault (for differential current circuit breakers H02H3/335) · CPC title

• H02H7/0833

  for electric motors with control arrangements · CPC title

• G01R31/3277 Primary

  of low voltage devices, e.g. domestic or industrial devices, such as motor protections, relays, rotation switches · CPC title

• G01R31/2621

  for testing field effect transistors, i.e. FET's · CPC title

• H02H7/0822

  Integrated protection, motor control centres · CPC title