Multi-mode compression acceleration

Patent metadata

Field	Value
Publication number	US-10587284-B2
Application number	US-201815948678-A
Country	US
Kind code	B2
Filing date	Apr 9, 2018
Priority date	Apr 9, 2018
Publication date	Mar 10, 2020
Grant date	Mar 10, 2020

Abstract

A computer system includes a plurality of hardware processors, and a hardware accelerator. A first processor among the plurality of processor runs an application that issues a data compression request to compress or decompress a data stream. The hardware accelerator selectively operates in different modes to compresses or decompresses the data stream. Based on a selected mode, the hardware accelerator can utilize a different number of processors among the plurality of hardware to compress or decompress the data stream.

First claim

What is claimed is:

1. A computer system comprising:
a plurality of hardware processors, wherein a first processor among the plurality of processor configured to run an application that issues a data compression request to compress or decompress a data stream; and
a hardware accelerator configured to compress or decompress the data stream, and configured to monitor a current workload of each hardware processor among the plurality of processors,
wherein the computer system is configured to selectively operate in a plurality of different compression modes, and
wherein a different number of processors among the plurality of hardware processors are utilized to compress or decompress the data stream based on a selected compression mode among the plurality of different compression modes, and wherein the hardware accelerator invokes the selected compression mode based on the current workload of each hardware processor.

2. The computer system of claim 1 , wherein at least one remaining processor among the plurality of processors is utilized to compress or decompress the data stream in response to invoking a first compression mode among the plurality of compression modes.

3. The computer system of claim 2 , wherein the at least one remaining processor is in signal communication with a second hardware accelerator, and the at least one remaining processor and second hardware accelerator are located remotely from the first processor and the hardware accelerator.

4. The computer system of claim 3 , wherein the at least one remaining processor includes a plurality of remaining processors that operate in parallel with one another, each processor among the plurality of remaining processors in signal communication with a corresponding hardware accelerator.

5. The computer system of claim 2 , wherein the accelerator utilizes the first processor while excluding remaining processors among the plurality of processors to compress or decompress the data stream in response to invoking a different second compression mode among the plurality of compression modes.

6. The computer system of claim 5 , wherein the data compression request includes compression information indicating an expected compression ratio associated with the data compression request, and wherein the hardware accelerator determines the expected compression ratio prior to compressing or decompressing the data stream, and automatically selects between the first compression mode and the second compression mode based on the expected compression ratio corresponding to the data compression request.

7. The computer system of claim 6 , wherein the application issues a compression mode request to invoke a selected compression mode among the plurality of different compression modes.

8. The computer system of claim 7 , wherein the accelerator overrides the compression mode request and invokes a second compression mode different from the compression mode indicated by the compression mode request in response to determining a presence of at least one override condition.

9. The computer system of claim 8 , wherein the override condition includes at least one of a compression ratio corresponding to the data compression request, a number of the remaining processors available to perform the data compression request, and an overall latency requirement of the computer system.

10. A method of controlling a hardware accelerator installed in a computer system, the method comprising:
running an application via a first processor included among a plurality of hardware processors, each processor in signal communication with a corresponding accelerator;
issuing, via the application, a data compression request to compress or decompress a data stream;
monitoring, via the hardware accelerator, a current workload of each hardware processor among the plurality of processors; and
selectively operating the computer system in a plurality of different compression modes to compress or decompress the data stream,
wherein the computer system invokes a different number of processors among the plurality of hardware based on a selected compression mode among the plurality of different compression modes, and each invoked processor uses the corresponding accelerator to compress or decompress the data stream, and
invoking, via the hardware accelerator, the selected compression mode based on the current workload of each hardware processor.

11. The method of claim 10 , further comprising invoking a first compression mode among the plurality of compression modes such that at least one remaining processor among the plurality of processors is utilized to drive its corresponding accelerator and compress or decompress the data stream.

12. The method of claim 11 , wherein the at least one remaining processor is located remotely from the first processor.

13. The method of claim 12 , further comprising operating the remaining processors in parallel with one another to compress or decompress the data stream in response to invoking the first compression mode.

14. The method of claim 11 , further comprising invoking a different second compression mode among the plurality of compression modes such that the accelerator utilizes the first processor while remaining processors among the plurality of processors are excluded from compressing or decompressing the data stream.

15. The method of claim 14 , further comprising:
adding compression information indicating an expected compression ratio associated with the data compression request to the data compression request;
determining, via the hardware accelerator, the expected compression ratio prior to compressing or decompressing the data stream; and
automatically selecting, via the hardware accelerator, between the first compression mode and the second compression mode based on the expected compression ratio corresponding to the data compression request.

16. The method of claim 15 , further comprising issuing, via the application, a compression mode request that requests a selected compression mode among the plurality of different compression modes.

17. The method of claim 16 , further comprising:
overriding, via the accelerator, the compression mode request; and
invoking, via the accelerator, a second compression mode different from the compression mode indicated by the compression mode request in response to determining a presence of at least one override condition,
wherein the override condition includes at least one of a compression ratio corresponding to the data compression request, a number of the remaining processors available to perform the data compression request, and an overall latency requirement of the computer system.

18. A computer program product to control a computer system to perform compression or decompression of data stream, the computer program product comprising a non-transitory computer readable storage medium having program instructions embodied therewith, the program instructions executable by an electronic computer processor to control the computer system to perform operations comprising:
running an application via a first processor included among a plurality of hardware processors, each processor in signal communication with a corresponding accelerator;
issuing, via the application, a data compression request to compress or decompress a data stream;
monitoring, via the hardware accelerator, a current workload of each hardware processor among the plurality of processors; and
selectively operating the computer system in a plurality of different compression modes to compress or decompress t

Assignees

• IBM

Inventors

• Sofia Anthony T
• Klein Matthias
• Bradbury Jonathan D
• Sutton Peter

Classifications

• H03M7/3086 Primary

  employing a sliding window, e.g. LZ77 · CPC title

• G06F9/3877

  using a secondary processor, e.g. coprocessor (peripheral processor G06F13/12) · CPC title

• G06F15/17325

  Synchronisation; Hardware support therefor (intertask synchronisation G06F9/52) · CPC title

• H03M7/6094 Primary

  according to reasons other than compression rate or data type · CPC title