Non-inverting differential amplifier with configurable common-mode output signal and reduced common-mode gain

Patent metadata

Field	Value
Publication number	US-10587234-B2
Application number	US-201715648265-A
Country	US
Kind code	B2
Filing date	Jul 12, 2017
Priority date	Jul 12, 2017
Publication date	Mar 10, 2020
Grant date	Mar 10, 2020

Abstract

An embodiment of an amplifier circuit includes first, second, and third amplifiers. The first and second amplifiers are configured to amplify a differential input signal with a non-inverting gain. And the third amplifier, which can be a transconductance amplifier, is configured to cause the first and second amplifiers to amplify a common-mode input signal with a gain that is less than unity. The third amplifier can also be configured to cause the first and second amplifiers to generate a common-mode output voltage that is substantially independent of the common-mode input voltage. Consequently, in addition to presenting a high input impedance and a low noise factor, such an amplifier circuit has a configurable common-mode output voltage and has a lower common-mode gain (e.g., less than unity, approaching zero) than other non-inverting differential amplifiers.

First claim

What is claimed is:

1. An amplifier circuit, comprising:
a first amplifier having a noninverting input node configured to receive a first component of a differential input signal, having an inverting input node, and having an output node configured to provide a first component of a differential output signal;
a second amplifier having a noninverting input node configured to receive a second component of the differential input signal, having an inverting input node, and an output node configured to provide a second component of the differential output signal; and
a transconductance amplifier having an inverting input node configured to receive a reference signal, having a noninverting input node coupled to the output nodes of the first and second amplifiers, and having a first output node coupled to the inverting input node of at least one of the first amplifier and the second amplifier.

2. The amplifier circuit of claim 1 wherein the transconductance amplifier is configured to cause the first amplifier and the second amplifier to generate the first component and the second component, respectively, of the differential output signal about an output common-mode signal that is related to the reference signal.

3. The amplifier circuit of claim 1 wherein the transconductance amplifier is configured to cause the first amplifier and the second amplifier to generate the first component and the second component, respectively, of the differential output signal about an output common-mode signal that is approximately equal to the reference signal.

4. The amplifier circuit of claim 1 wherein:
the differential output signal includes a differential output voltage;
the reference signal includes a reference voltage; and
the transconductance amplifier is configured to cause the first amplifier and the second amplifier to generate the first component and the second component, respectively, of the differential output voltage about an output common-mode voltage that is approximately equal to the reference voltage.

5. The amplifier circuit of claim 1 , wherein:
the first output node of the transconductance amplifier is coupled to the inverting input node of one of the first amplifier and the second amplifier; and
the transconductance amplifier has a second output node coupled to the inverting input node of the other of the first amplifier and the second amplifier.

6. The amplifier circuit of claim 1 , further comprising:
a first feedback network coupled to the inverting input node and the output mode of the first amplifier; and
a second feedback network coupled to the inverting input node and the output node of the second amplifier.

7. The amplifier circuit of claim 1 , further comprising:
a first bias network coupled to the output node of the first amplifier and the noninverting input node of the transconductance amplifier; and
a second bias network coupled to the output node of the second amplifier and the noninverting input node of the transconductance amplifier.

8. The amplifier circuit of claim 1 , further comprising:
a first feedback network coupled to the inverting input node of the first amplifier and the output node of the transconductance amplifier; and
a second feedback network coupled to the inverting input node of the second amplifier and the output node of the transconductance amplifier.

9. The amplifier circuit of claim 5 , further comprising:
a first feedback network coupled to the inverting input node of the first amplifier and the first output node of the transconductance amplifier; and
a second feedback network coupled to the inverting input node of the second amplifier and the second output node of the transconductance amplifier.

10. The amplifier circuit of claim 1 wherein:
the first amplifier includes a first operational amplifier; and
the second amplifier includes a second operational amplifier.

11. The amplifier circuit of claim 1 wherein:
the first amplifier includes a first transconductance amplifier; and
the second amplifier includes a second transconductance amplifier.

12. The amplifier circuit of claim 1 wherein:
the noninverting node of the first amplifier is configured to receive a common-mode signal;
the noninverting node of the second amplifier is configured to receive the common-mode signal; and
the transconductance amplifier is configured to cause the first and second amplifiers to amplify the common-mode signal with a gain that is less than unity.

13. An amplifier circuit, comprising:
first and second amplifiers configured
to receive a differential input signal, and
to multiply the differential input signal by a differential gain that is greater than zero; and

a third amplifier configured
to receive a reference signal, and
to cause the first and second amplifiers to generate a common-mode output signal that is related to the reference signal.

14. The amplifier circuit of claim 13 wherein the third amplifier includes a transconductance amplifier.

15. A method, comprising:
generating a differential output signal by amplifying a differential input signal with a non-inverting gain;
loading a common-mode reference signal with an impedance no less than an input impedance of an amplifier; and
generating a common-mode output signal by amplifying the common-mode reference signal with a gain having a magnitude that is less than unity.

16. The method of claim 15 wherein:
generating the differential output signal includes
amplifying a first component of the differential input signal with a first amplifier, and
amplifying a second component of the differential input signal a second amplifier; and

causing the first and second amplifiers to generate the common-mode output signal approximately equal to the reference signal.

17. The method of claim 15 wherein:
generating the differential output signal includes
amplifying a first component of the differential input signal with a first amplifier, and
amplifying a second component of the differential input signal a second amplifier; and

causing the first and second amplifiers to generate the common-mode output signal approximately equal to the reference signal by
generating, in response to the common-mode output signal and the reference signal, a feedback signal, and
coupling the feedback signal to an input node of the first amplifier and to an input node of the second amplifier.

18. The method of claim 15 wherein:
generating the differential output signal includes
amplifying a first component of the differential input signal with a first amplifier, and
amplifying a second component of the differential input signal a second amplifier; and

causing the first and second amplifiers to generate the common-mode output signal approximately equal to the reference signal by
generating, in response to the common-mode output signal and the reference signal, first and second feedback signals,
coupling the first feedback signal to an input node of the first amplifier, and
coupling the second feedback signal to an input node of the second amplifier.

19. A subsystem, comprising:
a sensor configured to generate a differential sensor signal; and
an amplifier circuit, including
a first amplifier having a noninverting input node configured to receive a first component of the differential sensor signal, having an inverting input node, and having an output node configured to provide a first component of a differential amplified sensor signal;
a second amplifier having a noninverting input node configured to re

Assignees

• Honeywell Int Inc

Inventors

• Werking Paul M

Classifications

• H03F3/45475 Primary

  using IC blocks as the active amplifying circuit · CPC title

• H03F2203/45076

  the resulting deducted common mode signal being added to or controls the differential amplifier, and being a current signal · CPC title

• H03F2203/45111

  Two dif amps of the same type are used one dif amp for each input signal · CPC title

• H03F3/45932

  by using feedback means (H03F3/45968 takes precedence) · CPC title

• H03F3/45488 Primary

  by using feedback means (H03F3/4578 takes precedence) · CPC title