Fast switching and ultra-low power compact varactor driver
US-2024356509-A1 · Oct 24, 2024 · US
US10587227B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10587227-B2 |
| Application number | US-201615554366-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 3, 2016 |
| Priority date | Mar 24, 2015 |
| Publication date | Mar 10, 2020 |
| Grant date | Mar 10, 2020 |
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An amplifier includes a P-type transistor and an N-type transistor connected in series, and an operational amplifier. An output terminal of the operational amplifier is connected to gates of both the P-type transistor and the N-type transistor. One of an inverting input terminal and a non-inverting input terminal of the operational amplifier is connected to drains of both the P-type transistor and the N-type transistor. Further, a predetermined reference voltage is applied to another of the inverting input terminal and the non-inverting input terminal.
Opening claim text (preview).
The invention claimed is: 1. An amplifier, comprising: a P-type transistor and an N-type transistor connected in series; an operational amplifier, wherein an output terminal of the operational amplifier is connected to gates of both the P-type transistor and the N-type transistor, one of an inverting input terminal and a non-inverting input terminal of the operational amplifier is connected to drains of both the P-type transistor and the N-type transistor, and a predetermined reference voltage is applied to another of the inverting input terminal and the non-inverting input terminal; a bias voltage supply unit that supplies a predetermined bias voltage to the gate of one of the P-type transistor and the N-type transistor; and a capacitor inserted between the gate of the P-type transistor and the gate of the N-type transistor. 2. The amplifier according to claim 1 , further comprising: a current source connected to the drain. 3. The amplifier according to claim 2 , further comprising: a comparator that compares a potential of the gate and a predetermined potential and supplies a result of the comparison, wherein the current source supplies the predetermined current on a basis of the comparison result of the comparator. 4. The amplifier according to claim 2 , further comprising: a low-pass filter, wherein the current source includes a transistor, and the low-pass filter supplies a DC bias voltage to a gate terminal of the transistor. 5. The amplifier according to claim 1 , further comprising: an impedance matching circuit that causes impedances of circuits on both ends of a transmission channel connected to the amplifier to match with each other. 6. The amplifier according to claim 1 , wherein the predetermined reference voltage is a value equal to or more than a saturation drain voltage of one of the P-type transistor and the N-type transistor. 7. An amplifier, comprising: a P-type transistor and an N-type transistor connected in series; an operational amplifier, wherein an output terminal of the operational amplifier is connected to gates of both the P-type transistor and the N-type transistor, one of an inverting input terminal and a non-inverting input terminal of the operational amplifier is connected to drains of both the P-type transistor and the N-type transistor, and a predetermined reference voltage is applied to another of the inverting input terminal and the non-inverting input terminal; a current source connected to the drain; and a cascode transistor device inserted between the drain and the current source. 8. An electronic circuit, comprising: an amplifier including a P-type transistor and an N-type transistor connected in series and an operational amplifier, in which an output terminal of the operational amplifier is connected to gates of both the P-type transistor and the N-type transistor, one of an inverting input terminal and a non-inverting input terminal of the operational amplifier is connected to drains of both the P-type transistor and the N-type transistor, and a predetermined reference voltage is applied to another of the inverting input terminal and the non-inverting input terminal; a signal processing unit that processes a signal output from the drain; a bias voltage supply unit that supplies a bias voltage having a value indicated by a control signal to the gate of one of the P-type transistor and the N-type transistor; and a capacitor inserted between the gate of the P-type transistor and the gate of the N-type transistor. 9. The electronic circuit according to claim 8 , wherein the signal processing unit processes a signal output from the drain and generates the control signal on a basis of a level of the signal.
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the amplifier being a low noise amplifier [LNA] · CPC title
Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title
with field-effect devices (H03F3/195 takes precedence) · CPC title
Noise reduction and elimination in amplifier · CPC title
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