Power transistor with distributed gate

Patent metadata

Field	Value
Publication number	US-10587194-B2
Application number	US-201514831742-A
Country	US
Kind code	B2
Filing date	Aug 20, 2015
Priority date	Aug 20, 2014
Publication date	Mar 10, 2020
Grant date	Mar 10, 2020

Abstract

An electronic circuit is disclosed. The electronic circuit includes a distributed power switch. In some embodiments, the electronic circuit also includes one or more of a distributed gate driver, a distributed gate pulldown device, a distributed diode, and a low resistance gate and/or source connection structure. An electronic component comprising the circuit, and methods of manufacturing the circuit are also disclosed.

First claim

What is claimed is:

1. An electronic integrated circuit, comprising:
a substrate comprising GaN; and
a GaN half bridge circuit integrated on the substrate, wherein the half bridge circuit comprises:
a high side circuit, comprising:
a high side distributed GaN power switch formed on the substrate, wherein the high side distributed power switch comprises a plurality of high side sub-transistors, and wherein each high side sub-transistor comprises a high side gate, a high side source, and a high side drain, wherein the high side source of each high side sub-transistor is electrically connected with the high side source of each of the other high side sub-transistors at a common high side source node, and wherein the high side drain of each high side sub-transistor is electrically connected with the high side drain of each of the other high side sub-transistors at a common high side drain node, and
a high side distributed GaN drive circuit formed on the substrate, wherein the high side distributed drive circuit comprises a high side distributed output stage formed by a plurality of high side sub-drivers, wherein each high side sub-driver comprises a high side input and a high side output, wherein the high side input of each high side sub-driver is electrically connected with the high side input of each of the other high side sub-drivers at a single common high side input node, and wherein the high side output of each high side sub-driver is connected to a high side gate of one or more corresponding high side sub-transistors of the high side sub-transistors of the high side distributed power switch such that the high side output of each high side sub-driver is configured to control whether the one or more corresponding high side sub-transistors is conductive or non-conductive between the common high side source node and the common high side drain node based on a voltage value at the single common high side input node, wherein the voltage value at the single common high side input node determines whether the high side sub-transistors are conductive or high side non-conductive, wherein the high side distributed GaN drive circuit is configured to receive a changing high side input logic signal at the single common high side input node, wherein the high side output of each high side sub-driver is configured to generate a corresponding changing high side output logic signal based on the changing high side input logic signal, and wherein the changing high side input logic signal and the corresponding changing high side output logic signal each change between first and second voltage values,
wherein the high side distributed GaN drive circuit is configured to control an electrical conductivity of each of the high side sub-transistors of the high side distributed GaN power switch such that the high side sub-transistors are turned on or off at substantially the same time, and

a low side circuit, comprising:
a low side distributed low side GaN power switch formed on the substrate, wherein the low side distributed power switch comprises a plurality of low side sub-transistors, and wherein each low side sub-transistor comprises a low side gate, a low side source, and a low side drain, wherein the low side source of each low side sub-transistor is electrically connected with the low side source of each of the other low side sub-transistors at a common low side source node, and wherein the low side drain of each low side sub-transistor is electrically connected with the low side drain of each of the other low side sub-transistors at a common low side drain node,
a low side distributed GaN drive circuit formed on the substrate, wherein the low side distributed drive circuit comprises a low side distributed output stage formed by a plurality of low side sub-drivers, wherein each low side sub-driver comprises a low side input and a low side output, wherein the low side input of each low side sub-driver is electrically connected with the low side input of each of the other low side sub-drivers at a single common low side input node, and wherein the low side output of each low side sub-driver is connected to a low side gate of one or more corresponding low side sub-transistors of the low side sub-transistors of the low side distributed power switch such that the low side output of each low side sub-driver is configured to control whether the one or more corresponding low side sub-transistors is conductive or non-conductive between the common low side source node and the common low side drain node based on a voltage value at the single common low side input node, wherein the voltage value at the single common low side input node determines whether the low side sub-transistors are conductive or low side non-conductive, wherein the low side distributed GaN drive circuit is configured to receive a changing low side input logic signal at the single common low side input node, wherein the low side output of each low side sub-driver is configured to generate a corresponding changing low side output logic signal based on the changing low side input logic signal, and wherein the changing low side input logic signal and the corresponding changing low side output logic signal each change between first and second voltage values,
wherein the low side distributed GaN drive circuit is configured to control an electrical conductivity of each of the low side sub-transistors of the low side distributed GaN power switch such that the low side sub-transistors are turned on or off at substantially the same time, and
a low side signal generator, configured to generate a low side signal at the single common low side input node to control the low side sub-transistors of the low side distributed GaN power switch with the low side sub-drivers of the low side distributed GaN drive circuit, wherein the low side signal generator is further configured to generate a high side control signal wherein the high side circuit is configured to generate a high side signal to control the high side GaN power switch, and wherein the high side circuit is configured to generate the high side signal based on the high side control signal from the low side signal generator.

2. The electronic circuit of claim 1 , wherein the sub-transistors of each of the high side and low side distributed power switches are respectively spaced according to a first pitch, and the sub-drivers of each of the high side and low side distributed drive circuits are respectively spaced according to a second pitch, and wherein the second pitch is equal to N times the first pitch, wherein N is an integer.

3. The electronic circuit of claim 1 , wherein the high side and low side inputs of the high side and low side sub-drivers of the high side and low side distributed drive circuits are respectively connected to a high side node and a low side node by a plurality of conductors, and wherein the conductors have substantially identical impedances.

4. The electronic circuit of claim 1 , wherein the outputs of the high side and low side sub-drivers of the high side and low side distributed drive circuits are connected to the high side and low side sub-transistors of the high side and low side distributed power switches by a plurality of conductors, and wherein the conductors have substantially identical impedances.

5. An electronic component comprising:
a package base; and
at least one GaN-based die secured to the package base and including an electronic circuit comprising:
a substrate comprising GaN; and
a GaN half bridge circuit integrated on the substrate, wherein the half bridge circuit comprises:
a high side circuit, comprising:
a high side distributed GaN power switch formed on the die, wherein the high side distributed power switch comprises a plurality of high side sub-transistors, and wherein each high side sub-tr

Assignees

• Navitas Semiconductor Inc

Inventors

• Kinzer Daniel M

Classifications

• H03K17/6871

  the output circuit comprising more than one controlled field-effect transistor · CPC title

• H02M1/088

  for the simultaneous control of series or parallel connected semiconductor devices · CPC title

• H02M1/096

  the power supply of the control circuit being connected in parallel to the main switching element (H02M1/092 takes precedence) · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H01L29/872

  Electricity · mapped topic