Supply voltage selection circuitry
US-2018226817-A1 · Aug 9, 2018 · US
US10586484B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10586484-B2 |
| Application number | US-201816023921-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 29, 2018 |
| Priority date | Aug 22, 2017 |
| Publication date | Mar 10, 2020 |
| Grant date | Mar 10, 2020 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
The present disclosure discloses a selection and output circuit, and a display device, and the selection and output circuit includes: a first control sub-circuit, a second control sub-circuit, a first output sub-circuit, and a second output sub-circuit, where the first control sub-circuit, the second control sub-circuit, the first output sub-circuit, and the second output sub-circuit are arranged so that the first output sub-circuit and the second output sub-circuit are controlled by the first control sub-circuit and the second control sub-circuit to operate in such a way that only one of the sub-circuits outputs a signal, and the other sub-circuit outputs no signal.
Opening claim text (preview).
The invention claimed is: 1. A selection and output circuit, comprising: a first control sub-circuit, a second control sub-circuit, a first output sub-circuit, a second output sub-circuit, a first input terminal, a second input terminal, a reference signal terminal, a control terminal, and an output terminal, wherein: the first control sub-circuit comprises a first switch transistor and a first resistor, wherein the first switch has a gate connected with the control terminal, a first electrode connected with the reference signal terminal, and a second electrode connected with the first node; and the first resistor has one terminal connected with a first node, and the other terminal connected with the second input terminal, the first control sub-circuit is configured to provide the first node with a first control signal or a second control signal under the control of the control terminal; wherein the first control signal is from the reference signal terminal, the second control signal is from the second input terminal; the first control signal and the second control signal are inverted signals; the second control sub-circuit comprising a NOT gate, wherein the NOT gate has an input terminal connected with the first node, a first power supply terminal connected with the reference signal terminal, a second power supply terminal connected with the second input terminal, and an output terminal connected with the second output terminal, the second control sub-circuit is configured to provide the second output sub-circuit with a signal of the second input terminal when the signal of the first node is the first control signal via the NOT gate, and to provide the second output sub-circuit with a signal of the reference signal terminal when the signal of the first node is the second control signal via the NOT gate; the first output sub-circuit comprising a second switch transistor, wherein the second switch transistor has a gate connected with the first node, a first electrode connected with the first input terminal, and a second electrode connected with the output terminal, the first output sub-circuit is configured to provide the output terminal with a signal of the first input terminal when the signal of the first node is the first control signal; and the second output sub-circuit comprising a third switch transistor, wherein the third switch transistor has a gate connected with the output terminal of the NOT gate of the second control sub-circuit, a first electrode connected with the second input terminal, and a second electrode connected with the output terminal, the second output sub-circuit is configured to provide the output terminal with the signal of the second input terminal when the second control sub-circuit provides the second output sub-circuit with the signal of the reference signal terminal, the selection and output circuit, further comprising a first protection sub-circuit and a second protection sub-circuit, wherein: the first protection sub-circuit comprises a first diode, wherein the first diode has an input terminal connected with the first output sub-circuit, and an output terminal connected with the output terminal, the first protection sub-circuit is configured to provide the output terminal with the signal output by the first output sub-circuit; the second protection sub-circuit comprising a second diode, wherein the second diode has an input terminal connected with the second output sub-circuit, and an output terminal connected with the output terminal, the second protection sub-circuit is configured to provide the output terminal with the signal output by the second output sub-circuit. 2. A display device, comprising the selection and output circuit according to claim 1 .
Details of a shift registers arranged for use in a driving circuit · CPC title
Details of output amplifiers or buffers arranged for use in a driving circuit · CPC title
Generation of voltages supplied to electrode drivers · CPC title
Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays · CPC title
for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.