Method and apparatus for rendering using locations and sizes of primitives

US10580193B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10580193-B2
Application numberUS-201715403612-A
CountryUS
Kind codeB2
Filing dateJan 11, 2017
Priority dateJan 11, 2016
Publication dateMar 3, 2020
Grant dateMar 3, 2020

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  1. Title

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  5. First independent claim

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Abstract

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A graphics processing method and apparatus includes determining locations of primitives in a 3-dimensional (3D) space from graphics data for the 3D space in a memory, determining sizes of the primitives, generating Morton codes comprising a piece of information indicating the locations of the primitives and a piece of information indicating the sizes of the primitives, classifying the primitives into bounding boxes using the piece of information indicating the sizes of the primitives, and generating the acceleration structure indicating an inclusion relationship between the bounding boxes.

First claim

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What is claimed is: 1. A graphics processing method comprising: executing, by one or more processors, operations comprising: determining locations of primitives in a 3-dimensional (3D) space from graphics data for the 3D space in a memory; determining sizes of the primitives; generating Morton codes each comprising a piece of information indicating the locations of respective primitives and a piece of information indicating the sizes of respective primitives; classifying the primitives into bounding boxes using the piece of information indicating the sizes of the respective primitives; generating an acceleration structure indicating an inclusion relationship between the bounding boxes; and rendering image data based on the acceleration structure, wherein one of the pieces of information indicating the sizes of the respective primitives comprises a binary bit in binary numbers indicating the sizes of the respective primitives, determining the locations of the primitives comprises determining x-axis, y-axis, and z-axis coordinates of the primitives within the 3D space, the piece of information indicating the locations of the primitives comprises a binary bit in a binary number indicating the x-axis coordinates, a binary bit in a binary number indicating the y-axis coordinates, and a binary bit in a binary number indicating the z-axis coordinates, and the Morton codes are generated by combining, in order, the binary bit in the binary number indicating the x-axis coordinates, the binary number indicating the z-axis coordinates, and the binary bit in the binary number indicating the sizes of the primitives. 2. The method of claim 1 , wherein the classifying of the primitives comprises classifying the primitives having sizes greater than a critical value into first bounding boxes and primitives having sizes less than the critical value into second bounding boxes. 3. The method of claim 1 , wherein the determining of the sizes of the primitives comprises: determining respective sizes of the bounding boxes; and indicating the sizes of the primitives based on the respective sizes of the bounding boxes. 4. The method of claim 3 , wherein the determining of the sizes of the bounding boxes comprises calculating respective diagonal lengths of the bounding boxes, and determining the respective sizes of the bounding boxes based on the respective diagonal lengths. 5. The method of claim 1 , wherein, in the classifying of the primitives into the bounding boxes, the primitives are classified into the first bounding box comprising primitives of which the binary bit is 1 and the second bounding box comprising primitives of which the at least one binary bit is 0. 6. The method of claim 5 , wherein the generating of the acceleration structure comprises: generating a first node corresponding to the first bounding box; generating a second node corresponding to the second bounding box; and adding the first and second nodes to the acceleration structure as a child node of a third node corresponding to the 3D space. 7. A non-transitory computer-readable recording medium storing instructions that, when executed by one or more processors, cause the one or more processors to perform the method of claim 1 . 8. A graphics processing apparatus comprising: a memory configured to store graphics data for a 3-dimensional (3D) space; a processor configured to: determine locations of primitives in the 3D space from the graphics data for the 3D space in a memory; determine sizes of the primitives; generate Morton codes each comprising a piece of information indicating the locations of respective primitives and a piece of information indicating sizes of the respective primitives; classify the primitives into bounding boxes based on the pieces of the information indicating the sizes of the respective primitives; and generate an acceleration structure indicating an inclusion relationship between the bounding boxes; and a ray tracing core configured to render image data based on the acceleration structure, wherein the piece of information indicating the sizes of the primitives comprises a binary bit in binary numbers indicating the sizes of the primitives, wherein the processor is further configured to determine x-axis, y-axis, and z-axis coordinates of the primitives within the 3D space, and the piece of information indicating the locations of the primitives comprises a binary bit in binary number indicating the x-axis coordinates, a binary bit in binary number indicating the y-axis coordinates, and a binary bit in binary number indicating the z-axis coordinates, wherein the processor is further configured to generate the Morton codes by combining, in order, the binary bit in the binary number indicating the x-axis coordinates, the binary bit in the binary number indicating the y-axis coordinates, the binary bit in the binary number indicating the z-axis coordinates, and the binary bit in the binary number indicating the sizes of the primitives. 9. The apparatus of claim 8 , wherein the processor is further configured to classify the primitives in the 3D space into first bounding boxes comprising primitives having a size greater than a critical value and second bounding boxes comprising primitives having a size less than the critical value. 10. The apparatus of claim 9 , wherein the processor is further configured to determine sizes of the first or second, or both, bounding boxes and indicate the sizes of the primitives based on the sizes of the first or second, or both, bounding boxes. 11. The apparatus of claim 10 , wherein the processor is further configured to calculate diagonal lengths of the first or second, or both, bounding boxes and determine the sizes of the first or second, or both, bounding boxes based on the diagonal lengths. 12. The apparatus of claim 8 , wherein the processor is further configured to classify the primitives into the first bounding box comprising primitives of which the binary bit is 1 and the second bounding box comprising primitives of which the at least one binary bit is 0. 13. The apparatus of claim 12 , wherein the processor is further configured to: generate a first node corresponding to the first bounding box; generate a second node corresponding to the second bounding box; and add the first and second nodes to the acceleration structure as a child node of a third node corresponding to the 3D space. 14. The apparatus of claim 8 , wherein the apparatus is a graphics processing unit (GPU) and further comprises one or more rendering cores.

Assignees

Inventors

Classifications

  • G06T15/06Primary

    Ray-tracing · CPC title

  • Constructive solid geometry [CSG] using solid primitives, e.g. cylinders, cubes · CPC title

  • Bounding box · CPC title

  • General purpose rendering architectures · CPC title

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What does patent US10580193B2 cover?
A graphics processing method and apparatus includes determining locations of primitives in a 3-dimensional (3D) space from graphics data for the 3D space in a memory, determining sizes of the primitives, generating Morton codes comprising a piece of information indicating the locations of the primitives and a piece of information indicating the sizes of the primitives, classifying the primitive…
Who is the assignee on this patent?
Samsung Electronics Co Ltd, Czech Technical Univ Faculty Of Electrical Engineering
What technology area does this patent fall under?
Primary CPC classification G06T15/06. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 03 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).