Amplifier and transmitter, and transmission method

Patent metadata

Field	Value
Publication number	US-10574199-B2
Application number	US-201615772888-A
Country	US
Kind code	B2
Filing date	Nov 8, 2016
Priority date	Nov 11, 2015
Publication date	Feb 25, 2020
Grant date	Feb 25, 2020

Abstract

The purpose of the present invention is to provide an amplifier having high signal-to-noise ratio of a transmitted signal and high electrical efficiency. Another purpose is to suppress complexity of amplifier's wiring connecting a signal generator that generates a binary digital signal and an amplification unit that amplifies the same. This amplifier generates a binary digital signal. The amplifier further generates a K-value digital signal (K is an integer greater than or equal to 3) from the binary digital signal and generating a plurality of binary digital signals from the K-value digital signal. The amplifier amplifies each of the plurality of binary digital signals, and combines the plurality of amplified binary digital signals and generating a combined signal having a substantially proportional relationship with the K-value digital signal.

First claim

What is claimed is:

1. An amplifier configured to:
generate a K-value digital signal (K is an integer greater than or equal to 3) from a binary digital signal;
generate a plurality of binary digital signals from the K-value digital signal;
amplify the plurality of binary digital signals, respectively;

combine the plurality of amplified binary digital signals;
generate the K-value digital signal using a digital filter; and
generate the plurality of binary digital signals from the K-value digital signal using a code converter.

2. The amplifier according to claim 1 , wherein the code converter generates the plurality of binary digital signals in a way that the K-value digital signal and the combined signal have an approximately proportional relationship.

3. The amplifier according to claim 1 , further configured to:
amplify the K-value digital signal wherein an amplification factor weighted in a way that the K-value digital signal and the combined signal have an approximately proportional relationship.

4. The amplifier according to claim 1 , wherein the digital filter comprises an FIR filter.

5. The amplifier according to claim 1 , further configured to:
prior to the generation of the K-value digital signal, generate an I/Q quadrature signal from the binary digital signal, and down-sample each of the I/Q quadrature signals; and
subsequent to the generation of the K-value digital signal, quadrature-modulate each output of the signal and input each quadrature-modulated output to a plurality of the amplification.

6. The amplifier according to claim 1 , wherein the amplification comprises a class-D amplification.

7. The amplifier according to claim 1 , further configured to:
generate each of I/Q quadrature signals from the binary digital signals;
down-sample each of the I/Q quadrature signals;
generate a K-value digital signal from each of the down-sampled I/Q quadrature signals;
up-convert each of the K-value digital signals generated by the digital filtering;
generate a binary digital signal from each of the up-converted K-value digital signals;
select each of the binary digital signals generated by the code converting; and
generate a binary digital signal to be output to each of a plurality of the amplification.

8. The amplifier according to claim 1 , further configured to:
divide the binary digital signal into a plurality of binary digital signals;
down-sample each of the plurality of divided binary digital signals;
generate a K-value digital signal from each of the down-sampled binary digital signals;
generate binary digital signals from each of the K-value digital signals; and
alternately select each of the binary digital signals generated from each of the K-value digital signals, and generate a binary digital signal to be output to each of a plurality of the amplification.

9. The amplifier according to claim 4 , wherein the digital filter is an FIR filter which outputs a difference between an input signal and a delay signal of the input signal.

10. A transmitter comprising:
an amplifier according to claim 1 .

11. An amplification method comprising:
generating a binary digital signal;
generating a K-value digital signal (K is an integer greater than or equal to 3) from the binary digital signal;
generating a plurality of binary digital signals from the K-value digital signal;
amplifying the plurality of binary digital signals, respectively;
combining the plurality of amplified binary digital signals;
generating the K-value digital signal using a digital filter; and
generating the plurality of binary digital signals from the K-value digital signal using a code converter.

12. The amplification method according to claim 11 , further comprising:
generating an I/Q quadrature signal from the binary digital signal;
down-sampling each of the I/Q quadrature signals;
generating the K-value digital signal from each of the down-sampled I/Q quadrature signals;
generating each of a plurality of binary digital signals from the K-value digital signal;
quadrature-modulating the plurality of binary digital signals;
amplifying each of the plurality of quadrature-modulated binary digital signals; and
combining the plurality of amplified binary digital signals, and generating a combined signal.

13. The amplification method according to claim 11 , further comprising:
generating the plurality of binary digital signals in a way that the K-value digital signal and the combined signal have an approximately proportional relationship.

14. The amplification method according to claim 12 , further comprising:
generating the plurality of binary digital signals in a way that the K-value digital signal and the combined signal have an approximately proportional relationship.

15. The amplifier according to claim 2 , further configured to:
amplify the K-value digital signal wherein an amplification factor weighted in a way that the K-value digital signal and the combined signal have an approximately proportional relationship.

16. The amplifier according to claim 2 , wherein the digital filter comprises an FIR filter.

17. The amplifier according to claim 3 , wherein the digital filter comprises an FIR filter.

18. The amplifier according to claim 1 , further configured to:
prior to the generation of the K-value digital signal, generate an I/Q quadrature signal from the binary digital signal, and down-sample each of the I/Q quadrature signals; and
subsequent to the generation of the K-value digital signal,

quadrature-modulate each output of the signal and
input each quadrature-modulated output to a plurality of the amplification.

19. The amplifier according to claim 2 , further configured to:
prior to the generation of the K-value digital signal, generate an I/Q quadrature signal from the binary digital signal, and down-sample each of the I/Q quadrature signals; and
subsequent to the generation of the K-value digital signal, quadrature-modulate each output of the signal and input each quadrature-modulated output to a plurality of the amplification.

Assignees

• Nec Corp

Inventors

• Hori Shinichi
• Yamase Tomoyuki
• Tanio Masaaki

Classifications

• H04L25/49

  using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels {; Baseband coding techniques specific to data transmission systems (spectral shaping H04L25/03828)} · CPC title

• H04B1/04

  Circuits · CPC title

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

• H03F3/68

  Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics {(power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602)} · CPC title

• H03F3/245

  with semiconductor devices only · CPC title