Amplifier with local feedback loop

Patent metadata

Field	Value
Publication number	US-10574194-B2
Application number	US-201916514650-A
Country	US
Kind code	B2
Filing date	Jul 17, 2019
Priority date	May 30, 2018
Publication date	Feb 25, 2020
Grant date	Feb 25, 2020

Abstract

In a general aspect, a circuit can include an amplifier circuit including a first amplifier, a first feedback path, and a second feedback path. The first feedback path can provide a feedback path from a positive output of the first amplifier to a negative input of the first amplifier. The second feedback path can provide a feedback path from a negative output of the first amplifier to a positive input of the first amplifier, The circuit can also include a loop circuit including a second amplifier, The loop circuit can be configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and into the negative input of the first amplifier.

First claim

What is claimed is:

1. A circuit comprising:
an amplifier circuit including a first amplifier, a first feedback path, and a second feedback path, the first feedback path providing a feedback path from a positive output of the first amplifier to a negative input of the first amplifier and the second feedback path providing a feedback path from a negative output of the first amplifier to a positive input of the first amplifier; and
a loop circuit including a second amplifier, the loop circuit being configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and into the negative input of the first amplifier.

2. The circuit of claim 1 , further comprising:
a chopper clock circuit configured to output a chopper clock signal at a variable duty cycle,
the loop circuit further including chopper switches, the chopper switches being configured to receive the chopper clock signal from the chopper clock circuit and control the current flow into the positive input of the first amplifier and into the negative input of the first amplifier.

3. The circuit of claim 2 , wherein the chopper switches are first chopper switches, the circuit further comprising:
second chopper switches configured to receive the chopper clock signal, the second chopper switches:
being coupled with the positive input of the first amplifier and the negative input of the first amplifier; and
based on the chopper clock signal, filtering respective signals applied to the positive input of the first amplifier and the negative input of the first amplifier.

4. The circuit of claim 3 , further comprising:
third chopper switches configured to receive the chopper clock signal, the third chopper switches:
being coupled with the positive output of the first amplifier and the negative output of the first amplifier; and
based on the chopper clock signal, control respective polarities of an output signal of the positive output of the first amplifier and the negative output of the first amplifier.

5. The circuit of claim 2 , wherein the chopper clock signal is based on at least one of an amplifier clock signal, the positive output of the first amplifier, or the negative output of the first amplifier.

6. The circuit of claim 2 , wherein a frequency of the chopper clock signal is variable.

7. The circuit of claim 2 , wherein the chopper switches selectively switch a current flow into the positive input of the first amplifier and into the negative input of the first amplifier in order to equalize a current flow into each of the positive input of the first amplifier and the negative input of the first amplifier.

8. The circuit of claim 1 , wherein a power supply rejection ratio for the first amplifier is dependent on a mismatch between a resistance of the first feedback path and a resistance of the second feedback path.

9. The circuit of claim 1 , wherein the first amplifier is a class D amplifier.

10. The circuit of claim 1 , wherein the amplifier circuit is a fully differential amplifier circuit.

11. The circuit of claim 1 , wherein the second amplifier is configured to force a voltage at the negative input of the first amplifier and at the positive input of the first amplifier to be equal to a constant voltage that is independent of a power supply voltage of the circuit.

12. The circuit of claim 11 wherein a first input to the second amplifier is the constant voltage and a second input to the second amplifier is a voltage representative of a voltage shift across a first input resistor and a second input resistor.

13. The circuit of claim 12 , wherein the first input resistor is connected to the negative input of the first amplifier and the second input resistor is connected to the positive input of the first amplifier.

14. A differential amplifier circuit comprising:
a differential amplifier configured to receive an input differential mode voltage and output an output differential mode voltage based on an input voltage;
a first feedback resistor connected between a positive output of the differential amplifier and a negative input of the differential amplifier;
a second feedback resistor connected between a negative output of the differential amplifier and a positive input of the differential amplifier;
a first input resistor connected to the first feedback resistor and the negative input of the differential amplifier; and
a second input resistor connected to the second feedback resistor and the positive input of the differential amplifier, a local feedback loop forcing the input voltage at the positive input and the negative input of the differential amplifier to be equal to a constant voltage that is independent of a power supply voltage of the differential amplifier circuit;
the output differential mode voltage being based on a mismatch between the first feedback resistor and the second feedback resistor.

15. The differential amplifier circuit of claim 14 , wherein the local feedback loop includes a feedback loop amplifier configured to sense a difference between the input voltage and a voltage representative of a voltage shift across the first input resistor and the second input resistor.

16. The differential amplifier circuit of claim 15 , wherein the local feedback loop further includes chopper switches configured to control current flow into the positive input of the differential amplifier and into the negative input of the differential amplifier.

17. The differential amplifier circuit of claim 16 , wherein controlling the current flow includes equalizing the current flow into the positive input of the differential amplifier and into the negative input of the differential amplifier.

18. A method comprising:
receiving, by an amplifier including a positive input and a negative input, an input differential voltage based on an input voltage;
controlling, by a local feedback loop, the input differential voltage, the controlling including:
switching a higher value current between the positive input and the negative input; and
based on the switching, equalizing a current flow into the positive input of the amplifier to a current flow into the negative input of the amplifier; and

based on the controlling of the input differential voltage received by the amplifier, outputting, by the amplifier, an output differential mode voltage that is independent of a power supply voltage for the amplifier.

19. The method of claim 18 , wherein the switching is controlled by a variable duty cycle clock signal.

20. The method of claim 19 , wherein the switching includes selectively switching a current flow into the positive input of the amplifier and into the negative input of the amplifier in order to equalize the respective current flows into each of the positive input of the amplifier and the negative input of the amplifier.

Assignees

• Semiconductor Components Ind Llc

Inventors

• Daigle Tyler
• Jasa Hrvoje
• Jordan Andrew
• Maher Gregory

Classifications

• H03F2200/372

  Noise reduction and elimination in amplifier · CPC title

• H03F3/45479

  characterised by the way of common mode signal rejection · CPC title

• H03F1/34 Primary

  Negative-feedback-circuit arrangements with or without positive feedback (H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence {; for rejection of common mode signals H03F3/45479}) · CPC title

• H03F1/3211

  in differential amplifiers · CPC title

• H03F1/26

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title