Catalyst layer, method for producing the same, membrane electrode assembly and electrochemical cell

US10573897B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10573897-B2
Application numberUS-201514850250-A
CountryUS
Kind codeB2
Filing dateSep 10, 2015
Priority dateSep 22, 2014
Publication dateFeb 25, 2020
Grant dateFeb 25, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the present disclosure aim to provide a catalyst layer ensuring a high cell voltage and having both excellent robustness and sufficient endurance, and also to provide a process for producing the layer, a membrane electrode assembly and an electrochemical cell. The catalyst layer comprises two or more noble metal-containing layers, and a porous ceramic layer placed between the noble metal-containing layers. Further, in the catalyst layer, voids exist between the porous ceramic layer and the noble metal-containing layers.

First claim

Opening claim text (preview).

The invention claimed is: 1. A catalyst layer, comprising: two or more noble metal-containing layers which consist of a metal or metal alloy; and a porous ceramic layer placed between said noble metal-containing layers, wherein void layers exist between said porous ceramic layer and said noble metal-containing layers, wherein said noble metal-containing layer and said porous ceramic layer have a fused portion of said noble metal-containing layer and said porous ceramic layer at an edge thereof, the fused portion connecting said noble metal-containing layer and said porous ceramic layer physically such that main surfaces of said noble metal-containing layer and said porous ceramic layer are kept separate via the void layer, and said porous ceramic layer has a composition different from a composition of said noble metal-containing layer, and consists of: an oxide or mixed oxide of at least one element of Ta, Sn, Zr, W and Nb; optionally at least one metal selected from the group consisting of Mn, Fe, Co, Ni, Zn, Sn, Al, and Cu; optionally an oxide of at least one metal selected from the group consisting of Mn, Fe, Co, Ni, Zn, Al, and Cu; and optionally a nitride of at least one metal selected from the group consisting of Mn, Fe, Co, Ni, Zn, Sn, Al, and Cu. 2. The catalyst layer according to claim 1 , further comprising fibrous carbons placed between said porous ceramic layer and said noble metal-containing layers. 3. The catalyst layer according to claim 1 , wherein the maximum distance from said porous ceramic layer to said noble metal-containing layers is 10 nm to 300 nm inclusive. 4. The catalyst layer according to claim 1 , wherein said noble metal-containing layers contain voids therein and the void contents thereof are 20 to 80 vol % inclusive. 5. The catalyst layer according to claim 1 , wherein said porous ceramic layer contains voids therein and the void content thereof is 20 to 80 vol % inclusive. 6. The catalyst layer according to claim 1 , wherein said porous ceramic layer has a thickness of 5 to 100 nm inclusive. 7. The catalyst layer according to claim 1 , wherein said noble metal-containing layers contain Pt. 8. The catalyst layer according to claim 1 , wherein said noble metal-containing layers contain an alloy represented by Pt y Ru z T 1-y-z , wherein 0.2≤y≤0.8, 0≤z≤0.8, and T represents at least one element selected from the group consisting of W, Hf, Si, Mo, Ta, Ti, Zr, Ni, Co, Nb, V, Sn, Al and Cr. 9. The catalyst layer according to claim 1 , wherein said noble metal-containing layers contain an alloy represented by Pt u M 1-u , wherein 0<u≤0.9 and M represents at least one element selected from the group consisting of Co, Ni, Fe, Mn, Ta, W, Hf, Si, Mo, Ti, Zr, Nb, V, Cr, Al and Sn. 10. The catalyst layer according to claim 1 , wherein the maximum distance between adjacent two of said noble metal-containing layers is 10 to 400 nm inclusive. 11. The catalyst layer according to claim 1 , wherein the oxide or mixed oxide of at least one element of Ta, Sn, Zr, W and Nb included in said porous ceramic layer is selected from the group consisting of NiTaO, WNbO and ZrTaO. 12. The catalyst layer according to claim 1 , wherein said porous ceramic layer contains voids therein and the void content thereof is 30 to 80 vol % inclusive.

Assignees

Inventors

Classifications

  • Methods for deposition of the catalytic active composition · CPC title

  • characterised by membrane-electrode assemblies [MEA] (H01M8/12 takes precedence) · CPC title

  • layered · CPC title

  • Porous electrodes · CPC title

  • H01M4/9041Primary

    Metals or alloys (H01M4/92 takes precedence) · CPC title

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What does patent US10573897B2 cover?
Embodiments of the present disclosure aim to provide a catalyst layer ensuring a high cell voltage and having both excellent robustness and sufficient endurance, and also to provide a process for producing the layer, a membrane electrode assembly and an electrochemical cell. The catalyst layer comprises two or more noble metal-containing layers, and a porous ceramic layer placed between the nob…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H01M4/9041. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 25 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).