Organic light emitting diode display device having a capacitor with stacked storage electrodes and method for manufacturing the same
US-9673267-B2 · Jun 6, 2017 · US
US10566402B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10566402-B2 |
| Application number | US-201615080388-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 24, 2016 |
| Priority date | Aug 19, 2015 |
| Publication date | Feb 18, 2020 |
| Grant date | Feb 18, 2020 |
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An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a plurality of pixels, each pixel including a driving circuit that includes a driving transistor and a storage capacitor electrically connected to the driving transistor. The driving transistor includes a driving active layer and a first electrode, the first electrode insulated from the driving active layer and disposed over at least a portion of the driving active layer. The storage capacitor includes a first capacitor including the first electrode and a second electrode facing the first electrode and a second capacitor comprising the second electrode and a third electrode facing the second electrode.
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What is claimed is: 1. An organic light-emitting diode (OLED) display, comprising: a plurality of pixels, each pixel comprising a driving circuit, wherein the driving circuit includes a driving transistor and a storage capacitor electrically connected to the driving transistor, wherein the driving transistor comprises a driving active layer and a first electrode, wherein the first electrode is insulated from the driving active layer and overlaps at least a portion of the driving active layer in a depth dimension of the OLED display, wherein the storage capacitor comprises a first capacitor comprising the first electrode and a second electrode over the first electrode and a second capacitor comprising the second electrode and a third electrode over the second electrode, wherein the first electrode is a driving gate electrode, wherein the driving active layer comprises a drain region overlapping each of the second electrode and the third electrode in the depth dimension of the OLED display, and wherein each of the second and third electrodes has an area larger than that of the first electrode. 2. The OLED display of claim 1 , wherein the first and third electrodes are electrically connected to each other. 3. The OLED display of claim 1 , further comprising an OLED including: a pixel electrode electrically connected to the driving transistor; a counter electrode facing the pixel electrode; and an organic emission layer interposed between the pixel and counter electrodes. 4. The OLED display of claim 3 , wherein each of the pixels comprises: a scan line extending in a first direction and disposed on the same layer as the first electrode; a data line extending in a second direction that crosses the first direction and disposed over a layer on which the third electrode is disposed; and a power line configured to apply a voltage to the driving transistor and disposed on the same layer as the data line. 5. The OLED display of claim 4 , further comprising: a first insulating layer interposed between the driving active layer and the first electrode; a second insulating layer interposed between the first and second electrodes; a third insulating layer interposed between the second and third electrodes; and a fourth insulating layer interposed between the third electrode and the power line, wherein the third and fourth insulating layers have a first contact hole formed therethrough, and wherein the second electrode is electrically connected to the power line through the first contact hole. 6. The OLED display of claim 5 , wherein the third electrode has a first opening corresponding to the first contact hole, and wherein the first opening has an area larger than that of the first contact hole. 7. The OLED display of claim 5 , wherein the driving active layer comprises a driving source region configured to receive a voltage from the power line, wherein a driving drain region is spaced apart from the driving source region, and the driving active layer further comprises a driving channel region configured to electrically connect the driving source and drain regions to each other, and wherein the OLED display further comprises a compensation transistor configured to electrically connect the driving drain region and the storage capacitor to each other. 8. The organic light-emitting diode (OLED) display of claim 1 , wherein the first, second and third electrodes overlap the driving active layer in a depth dimension of the OLED display. 9. The OLED display of claim 1 , wherein the storage capacitor is directly connected between a gate of the driving transistor and a power line supplying a transmitting driving voltage to the pixel. 10. The OLED display of claim 1 , wherein the driving active layer is arranged under the first electrode of the first capacitor and insulated from the first electrode of the first capacitor. 11. An organic light-emitting diode (OLED) display, comprising: a plurality of pixels, each pixel comprising a driving circuit, wherein the driving circuit includes a driving transistor and a storage capacitor electrically connected to the driving transistor, wherein the driving transistor comprises a driving active layer and a first electrode, wherein the first electrode is insulated from the driving active layer and overlaps at least a portion of the driving active layer in a depth dimension of the OLED display, wherein the storage capacitor comprises a first capacitor comprising the first electrode and a second electrode over the first electrode and a second capacitor comprising the second electrode and a third electrode over the second electrode, wherein the first electrode is a driving gate electrode, wherein the driving active layer comprises a drain region overlapping each of the second electrode and the third electrode in the depth dimension of the OLED display, and wherein the OLED display further comprises an insulating layer interposed between the second and third electrodes, wherein the second electrode; the insulating layer, and the third electrode comprise end portions that are continuously connected to one another without a step. 12. An organic light-emitting diode (OLED) display, comprising: a plurality of pixels, each pixel comprising a driving circuit, wherein the driving circuit includes a driving transistor and a storage capacitor electrically connected to the driving transistor; wherein the driving transistor comprises a driving active layer and a first electrode, wherein the first electrode is insulated from the driving active layer and overlaps at least a portion of the driving active layer in a depth dimension of the OLED display; wherein the storage capacitor comprises a first capacitor comprising the first electrode and a second electrode over the first electrode and a second capacitor comprising the second electrode and a third electrode over the second electrode; wherein the first electrode is a driving gate electrode, and the driving active layer comprises a drain region overlapping the second electrode in the depth dimension of the OLED display; wherein the OLED display further comprises: a pixel electrode electrically connected to the driving transistor; a counter electrode facing the pixel electrode; and an organic emission layer interposed between the pixel and counter electrodes; wherein each of the pixels comprises: a scan line extending in a first direction and disposed on the same layer as the first electrode; a data line extending in a second direction that crosses the first direction and disposed over a layer on which the third electrode is disposed; and a power line configured to apply a voltage to the driving transistor and disposed on the same layer as the data line; wherein the OLED display further comprising: a first insulating layer interposed between the driving active layer and the first electrode; a second insulating layer interposed between the first and second electrodes; a third insulating layer interposed between the second and third electrodes; and a fourth insulating layer interposed between the third electrode and the power line, wherein the third and fourth insulating layers have a first contact hole formed therethrough, and wherein the second electrode is electrically connected to the power line through the first contact hole; wherein the driving active layer comprises a driving source region configured to receive a voltage from the power line, wherein a driving drain region is spaced apart from the driving source region, and the driving active layer further comprises a driving channel region configured to electrically connect the driving source and drain regions to each other, and wherein the
Electricity · mapped topic
integrated with passive devices, e.g. auxiliary capacitors · CPC title
using masks, e.g. half-tone masks · CPC title
wherein the TFTs are in active matrices · CPC title
characterised by the shapes, relative sizes or dispositions of the gate electrodes · CPC title
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