Electronic device and electrical testing method thereof

Patent metadata

Field	Value
Publication number	US-10566253-B2
Application number	US-201815918321-A
Country	US
Kind code	B2
Filing date	Mar 12, 2018
Priority date	Nov 30, 2017
Publication date	Feb 18, 2020
Grant date	Feb 18, 2020

Abstract

An electronic device includes a substrate, an electronic component disposed over the substrate and an electrical testing component disposed over the substrate. The electronic component includes a bottom plate over the substrate, and a top plate over the bottom plate. The electrical testing component includes a first anti-fuse structure and a second anti-fuse structure, wherein the first anti-fuse structure and the second anti-fuse structure are electrically connected to the bottom plate.

First claim

What is claimed is:

1. An electronic device, comprising:
a substrate;
an electronic component disposed over the substrate, wherein the electronic component comprises:
a bottom plate over the substrate; and
a top plate over the bottom plate; and
an electrical testing component disposed over the substrate,
wherein the electrical testing component is fusible in order to be selectively electrically connected to the bottom plate of the electronic component;
wherein the electrical testing component comprises a first anti-fuse structure and a second anti-fuse structure, and the first anti-fuse structure and the second anti-fuse structure are fusible in order to be electrically connected to the bottom plate;
wherein the electronic component further comprises a dielectric layer between the bottom plate and the top plate, and a plurality of capacitor electrodes in the dielectric layer, wherein the plurality of capacitor electrodes are electrically connected to the bottom plate and the top plate;
wherein the first anti-fuse structure comprises:
a first bottom electrode over the substrate and electrically connected to the bottom plate;
a first top electrode penetrating the dielectric layer; and
a first contact pad disposed over the dielectric layer and electrically connected to the first top electrode; and

wherein the second anti-fuse structure comprises:
a second bottom electrode over the substrate and electrically connected to the bottom plate;
a second top electrode penetrating the dielectric layer; and
a second contact pad disposed over the dielectric layer and electrically connected to the second top electrode.

2. The electronic device of claim 1 , wherein the first bottom electrode of the first anti-fuse structure, the second bottom electrode of the second anti-fuse structure and the bottom plate of the electronic component are formed from a first conductive layer.

3. The electronic device of claim 1 , wherein the first top electrode of the first anti-fuse structure, the second top electrode of the second anti-fuse structure, and the capacitor electrodes of the electronic component are formed from a second conductive layer.

4. The electronic device of claim 1 , wherein the first contact pad of the first anti-fuse structure, the second contact pad of the second anti-fuse structure, and the top plate of the electronic component are formed from a third conductive layer.

5. The electronic device of claim 1 , further comprising a dielectric film disposed between the bottom plate and the dielectric layer.

6. The electronic device of claim 5 , wherein the dielectric film is ruptured such that the first top electrode is electrically connected to the first bottom electrode, and the second top electrode is electrically connected to the second bottom electrode.

7. An electric testing method, comprising:
providing an electronic device, comprising:
an electronic component, wherein the electronic component comprises:
a bottom plate; and
a top plate over the bottom plate; and
an electrical testing component, comprising:
a first anti-fuse structure; and
a second anti-fuse structure;

applying a first voltage to the first anti-fuse structure and a second voltage to the second anti-fuse structure, in order to electrically connect the first anti-fuse structure and the second anti-fuse structure to the bottom plate; and
testing the electronic component by applying a third voltage to one of the first anti-fuse structure and the second anti-fuse structure and a fourth voltage to the top plate.

Assignees

• Nanya Technology Corp

Inventors

• Chang Chih-Ying
• Jao Jui-Hsiu

Classifications

• G01R31/74

  Testing of fuses · CPC title

• G01R31/2831

  Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates (G01R31/318511 takes precedence; testing during manufacture H10P74/00) · CPC title

• G01R31/07

  Physics · mapped topic

• H01L21/823475

  Electricity · mapped topic

• H01L23/5252

  Electricity · mapped topic