Hybrid photonic non-blocking wide spectrum WDM on-chip router

US10564512B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10564512-B2
Application numberUS-201815888862-A
CountryUS
Kind codeB2
Filing dateFeb 5, 2018
Priority dateFeb 3, 2017
Publication dateFeb 18, 2020
Grant dateFeb 18, 2020

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Abstract

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Photonic data routing in optical networks is expected overcome the limitations of electronic routers with respect to data rate, latency, and energy consumption. However photonics-based routers suffer from dynamic power consumption, and non-simultaneous usage of multiple wavelength channels when microrings are deployed and are sizable in footprint. Here we show a design for the first hybrid photonic-plasmonic, non-blocking, broadband 5×5 router based on 3-waveguide silicon photonic-plasmonic 2×2 switches. The compactness of the router (footprint <200 μm 2 ) results in a short optical propagation delay (0.4 ps) enabling high data capacity up to 2 Tbps. The router has an average energy consumption ranging from 0.1˜1.0 fJ/bit depending on either DWDM or CDWM operation, enabled by the low electrical capacitance of the switch. The total average routing insertion loss of 2.5 dB is supported via an optical mode hybridization deployed inside the 2×2 switches, which minimizes the coupling losses between the photonic and plasmonic sections of the router. The router's spectral bandwidth resides in the S, C and L bands and exceeds 100 nm supporting WDM applications since no resonance feature are required. Moreover, this hybrid photonic-plasmonic switch design is also suitable for 3 up to a few dozens of routing ports by simply cascading our 2×2 switch with a specific pattern. Taken together this novel optical router combines multiple design features, all required in next generation high data-throughput optical networks and computing systems.

First claim

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The invention claimed is: 1. An electro-optical switch comprising: a substrate; a first optical waveguide disposed on the substrate; a second optical waveguide disposed on the substrate; a third optical waveguide disposed on the substrate situated in between the first and second optical waveguides; a first low dielectric layer disposed on the third optical waveguide; a conducting oxide layer that can be electro-optical tuned between dielectric and metallic modes disposed on the first low dielectric layer in between the first and second optical waveguides; a second low dielectric layer disposed on the conducting oxide layer; a metal layer disposed on top of the second low dielectric layer; wherein the first and second low dielectric layers, the conducting oxide layer, the metal layer, and the third optical waveguide effect optical switching. 2. The electro-optical switch of claim 1 , wherein the first and second low dielectric layers, the conducting oxide layer, and the metal layer effect optical switching across a certain range of light wavelengths. 3. The electro-optical switch of claim 1 , wherein the switch is intrinsically in an “OFF” state when there is no voltage applied. 4. The electro-optical switch of claim 1 , wherein the switch provides optimized light transfer from the first optical waveguide to the second waveguide. 5. The electro-optical switch of claim 1 , wherein the coupling length of the switch is 8.9 μm. 6. The electro-optical switch of claim 1 , wherein the switch operates at a wavelength bandwidth above 100 nm. 7. The electro-optical switch of claim 1 , wherein the switch is a hybrid photonic-plasmonic switch. 8. The electro-optical switch of claim 1 , wherein the switching island is designed to bias the conduction oxide layer from both the top and the bottom to improve the index tuning. 9. The electro-optical switch of claim 1 , wherein the third waveguide may be tuned to dark mode. 10. The electro-optical switch of claim 1 , wherein the total average routing insertion loss is no greater than 1.3 dB. 11. A router comprised of: a plurality of input ports and output ports and a plurality of electro-optical switches comprising hybrid photonic-plasmonic switches, wherein each electro-optical switch is comprised of: a low dielectric layer serving as a substrate; a first waveguide disposed on the low dielectric layer; a second waveguide disposed on the low dielectric layer; a third waveguide disposed on the low dielectric layer situated in between the first and second waveguides, said third waveguide comprising: a first low dielectric layer; an electro-optical tunable conducting oxide layer; a second low dielectric layer; a metal layer disposed on top of the second low dielectric layer; wherein there are (N−1)2/2 switches when N is odd and N(N−2)/2 switches when N is even, where N is the number of input ports and output ports; and wherein the router is configured to effect optical switching across the plurality of electro-optical switches across a certain range of light wavelength. 12. The router of claim 11 , wherein the plurality of electro-optical switches are intrinsically in an “OFF” state. 13. The router of claim 11 , wherein plurality of electro-optical switches operate at a wavelength bandwidth above 100 nm. 14. The router of claim 11 , wherein the plurality of electro-optical switches are arranged in a cascaded 3-waveguide-based 2×2 pattern. 15. The router of claim 11 , wherein each of the plurality of electro-optical switches operate at an average routing insertion loss of no greater than 2.5 dB.

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What does patent US10564512B2 cover?
Photonic data routing in optical networks is expected overcome the limitations of electronic routers with respect to data rate, latency, and energy consumption. However photonics-based routers suffer from dynamic power consumption, and non-simultaneous usage of multiple wavelength channels when microrings are deployed and are sizable in footprint. Here we show a design for the first hybrid phot…
Who is the assignee on this patent?
Univ George Washington
What technology area does this patent fall under?
Primary CPC classification G02F1/3132. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 18 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).