Low energy accelerator processor architecture with short parallel instruction word and non-orthogonal register data file
US-9952865-B2 · Apr 24, 2018 · US
US10564206B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10564206-B2 |
| Application number | US-201916520518-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 24, 2019 |
| Priority date | Dec 16, 2016 |
| Publication date | Feb 18, 2020 |
| Grant date | Feb 18, 2020 |
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In described examples, a time-domain analyzer is arranged to generate an indication of a number of high-frequency events of an electrical monitor signal that includes a fundamental periodic frequency. The high-frequency events include frequencies higher than the fundamental periodic frequency. A frequency-domain analyzer is arranged to generate frequency band information in response to frequencies of the electrical monitor signal that are higher than the fundamental periodic frequency. A fault detector is arranged to monitor the indication of the number of high-frequency events and the generated frequency band information, and to generate a fault flag in response to the monitored indication of the number of high-frequency events and the generated frequency band information.
Opening claim text (preview).
What is claimed is: 1. A system comprising: a first analyzer configured to: receive a monitor signal having a fundamental frequency; and generate a count of a number of events of the monitor signal having a respective frequency greater than the fundamental frequency; a second analyzer configured to: receive the monitor signal; and generate frequency information for the monitor signal; and a fault detector coupled to the first analyzer and the second analyzer and configured to: receive the count of the number of events and the frequency information; and generate a flag in response to the count of the number of events and the frequency information. 2. The system of claim 1 , wherein the first analyzer includes: a high-pass filter configured to receive the monitor signal; a comparator coupled to the high-pass filter and configured to compare an output of the high-pass filter with a threshold voltage; and an event counter coupled to the comparator and configured to generate the count of the number of events in response to the comparator. 3. The system of claim 1 , wherein the second analyzer includes a wave segment determinator configured to divide the monitor signal into wave segments. 4. The system of claim 3 , wherein the fault detector is configured to wake in response to the count of the number of events exceeding a threshold during one of the wave segments. 5. The system of claim 3 , wherein: the wave segment determinator is further configured to determine a zero crossing of the monitor signal; and the second analyzer further includes a digital signal processor configured to: wake in response to a current wave segment of the wave segments being proximate to the zero crossing of the monitor signal; and generate the frequency information for the monitor signal. 6. The system of claim 1 , wherein: the monitor signal corresponds to an alternating current power line; and the fundamental frequency is selected from a group consisting of about 60 Hz and about 50 Hz. 7. The system of claim 1 , wherein the fault detector includes a signature library that includes time-domain and frequency-domain signatures for indicating thresholds for fault conditions of a power line monitored by the monitor signal. 8. A device comprising: a set of inputs to receive a monitor signal having a fundamental frequency; a first analyzer coupled to the set of inputs and configured to provide a count of events in the monitor signal having a respective frequency greater than the fundamental frequency; a second analyzer coupled to the set of inputs and configured to provide frequency data of the monitor signal; and a fault detector coupled to the first analyzer and the second analyzer and configured to: wake in response to the count of events exceeding a threshold; and upon waking, assert a flag in response to the count of events and the frequency data. 9. The device of claim 8 , wherein the fault detector includes a signature library and is further configured to assert the flag based on a comparison of a property of the monitor signal to the signature library. 10. The device of claim 9 , wherein: the frequency data represents energy in the monitor signal at each of a set of frequencies; and the property compared by the fault detector includes the energy in the monitor signal at each of the set of frequencies. 11. The device of claim 9 , wherein: the second analyzer includes a wave segment determinator configured to: determine a zero crossing of the monitor signal; and divide the monitor signal into wave segments; and the property compared by the fault detector includes a proximity of a current wave segment of the wave segments to the zero crossing. 12. The device of claim 8 , wherein the first analyzer includes: a high-pass filter coupled to the set of inputs; a comparator coupled to the high-pass filter and to a threshold voltage; and an event counter coupled to the comparator to provide the count of events in response to the comparator. 13. The device of claim 8 , wherein the second analyzer includes: a low-pass filter coupled to the set of inputs; an analog-to-digital converter coupled to the low-pass filter; and a processor coupled to the analog-to-digital converter to provide the frequency data in response to the analog-to-digital converter. 14. The device of claim 13 , wherein: the second analyzer further includes a wave segment determinator configured to: determine a zero crossing of the monitor signal; and divide the monitor signal into wave segments; and the processor is configured to wake in response to a current wave segment of the wave segments being proximate to the zero crossing. 15. The device of claim 8 further comprising a level shifter coupling each of the first analyzer and the second analyzer to the set of inputs. 16. A method comprising: receiving a sensor signal having a fundamental frequency; determining a count of events in the sensor signal having a frequency greater than the fundamental frequency; determining frequency band information representing energy in each of a set of frequency bands; generating a flag in response to the count of events and the frequency band information. 17. The method of claim 16 , wherein: the generating of the flag is performed by a processor; and the method further comprises waking the processor in response to the count of events exceeding a threshold. 18. The method of claim 16 further comprising dividing the sensor signal into wave segments, and wherein the count of events is within a given wave segment of the wave segments. 19. The method of claim 18 , wherein: the determining of the frequency band information is performed by a processor; and the method further comprises waking the processor in response to a current segment of the wave segments being proximate to a zero crossing of the sensor signal. 20. The method of claim 19 , wherein the generating of the flag is further based on the current segment being proximate to the zero crossing of the sensor signal.
Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging · CPC title
for measuring frequency response characteristics, e.g. cut-off frequency thereof · CPC title
Locating faults in cables, transmission lines, or networks · CPC title
Physics · mapped topic
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